From: Thomas Gleixner <tglx@linutronix.de>
To: Kan Liang <kan.liang@intel.com>
Cc: peterz@infradead.org, mingo@redhat.com,
linux-kernel@vger.kernel.org, bp@alien8.de, acme@kernel.org,
eranian@google.com, jolsa@kernel.org, ak@linux.intel.com
Subject: Re: [PATCH V4 1/2] x86/msr: expose msr_flip_bit function
Date: Wed, 29 Mar 2017 07:47:26 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.20.1703290745050.2417@nanos> (raw)
In-Reply-To: <1490751920-44720-2-git-send-email-kan.liang@intel.com>
On Tue, 28 Mar 2017, kan.liang@intel.com wrote:
> From: Kan Liang <Kan.liang@intel.com>
>
> There is no exported kernel interfaces which can flip a MSR bit. It has
> to do read-modify-write operation on the MSR through rd/wrmsr*
> interfaces. But the method is not atomic.
>
> There is already __flip_bit support. Just rename and expose it.
This function is not atomic either. Protection has to be provided by the
caller.
> -static inline int __flip_bit(u32 msr, u8 bit, bool set)
> +int msr_flip_bit(u32 msr, u8 bit, bool set)
> {
> struct msr m, m1;
> int err = -EINVAL;
> @@ -85,6 +85,7 @@ static inline int __flip_bit(u32 msr, u8 bit, bool set)
>
> return 1;
> }
> +EXPORT_SYMBOL_GPL(msr_flip_bit);
That export is not required. The call site is always built in.
Thanks,
tglx
next prev parent reply other threads:[~2017-03-29 5:47 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-29 1:45 [PATCH V4 0/2] measure SMI cost (kernel) kan.liang
2017-03-29 1:45 ` [PATCH V4 1/2] x86/msr: expose msr_flip_bit function kan.liang
2017-03-29 5:47 ` Thomas Gleixner [this message]
2017-03-29 13:01 ` Liang, Kan
2017-03-29 1:45 ` [PATCH V4 2/2] perf/x86: add sysfs entry to freeze counter on SMI kan.liang
2017-03-29 4:18 ` Andi Kleen
2017-03-29 6:00 ` Thomas Gleixner
2017-03-29 6:24 ` Ingo Molnar
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