From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762060AbdEWHOr (ORCPT ); Tue, 23 May 2017 03:14:47 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:51795 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966090AbdEWHOo (ORCPT ); Tue, 23 May 2017 03:14:44 -0400 Date: Tue, 23 May 2017 09:14:25 +0200 (CEST) From: Thomas Gleixner To: Kan Liang cc: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org, bp@alien8.de, acme@kernel.org, eranian@google.com, jolsa@kernel.org, ak@linux.intel.com Subject: Re: [PATCH V7] perf/x86: add sysfs entry to freeze counter on SMI In-Reply-To: <1494600673-244667-1-git-send-email-kan.liang@intel.com> Message-ID: References: <1494600673-244667-1-git-send-email-kan.liang@intel.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 12 May 2017, kan.liang@intel.com wrote: > From: Kan Liang > > Currently, the SMIs are visible to all performance counters. Because > many users want to measure everything including SMIs. But in some > cases, the SMI cycles should not be count. For example, to calculate > the cost of SMI itself. So a knob is needed. > > When setting FREEZE_WHILE_SMM bit in IA32_DEBUGCTL, all performance > counters will be effected. There is no way to do per-counter freeze > on SMI. So it should not use the per-event interface (e.g. ioctl or > event attribute) to set FREEZE_WHILE_SMM bit. > > Adds sysfs entry /sys/device/cpu/freeze_on_smi to set FREEZE_WHILE_SMM > bit in IA32_DEBUGCTL. When set, freezes perfmon and trace messages > while in SMM. > Value has to be 0 or 1. It will be applied to all processors. > Also serialize the entire setting so we don't get multiple concurrent > threads trying to update to different values. > > Signed-off-by: Kan Liang Reviewed-by: Thomas Gleixner