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From: Thomas Gleixner <tglx@linutronix.de>
To: Dou Liyang <douly.fnst@cn.fujitsu.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org, mingo@kernel.org, hpa@zytor.com,
	ebiederm@xmission.com, bhe@redhat.com,
	boris.ostrovsky@oracle.com, peterz@infradead.org,
	izumi.taku@jp.fujitsu.com
Subject: Re: [PATCH v5 01/12] x86/apic: Construct a selector for the interrupt delivery mode
Date: Sun, 2 Jul 2017 19:37:10 +0200 (CEST)	[thread overview]
Message-ID: <alpine.DEB.2.20.1707021922000.2296@nanos> (raw)
In-Reply-To: <15d82d40aeec8d5935cca2c64ead8710861cd5f8.1498795030.git.douly.fnst@cn.fujitsu.com>

On Fri, 30 Jun 2017, Dou Liyang wrote:
> +static int __init apic_intr_mode_select(void)
> +{
> +	/* Check kernel option */
> +	if (disable_apic) {
> +		pr_info("APIC disabled via kernel command line\n");
> +		return APIC_PIC;
> +	}
> +
> +	/* Check BIOS */
> +#ifdef CONFIG_X86_64
> +	/* On 64-bit, the APIC must be integrated, Check local APIC only */
> +	if (!boot_cpu_has(X86_FEATURE_APIC)) {
> +		disable_apic = 1;
> +		pr_info("APIC disabled by BIOS\n");
> +		return APIC_PIC;
> +	}
> +#else
> +	/*
> +	 * On 32-bit, check whether there is a separate chip or integrated
> +	 * APIC
> +	 */
> +
> +	/* Has a local APIC ? */
> +	if (!boot_cpu_has(X86_FEATURE_APIC) &&
> +		APIC_INTEGRATED(boot_cpu_apic_version)) {

This looks wrong. The existing logic is:

	if (!boot_cpu_has(X86_FEATURE_APIC) && !smp_found_config)
		return -1;

	if (!boot_cpu_has(X86_FEATURE_APIC) &&
	                APIC_INTEGRATED(boot_cpu_apic_version)) {
		pr_err(....);

I know that this is magically the same because boot_cpu_apic_version is 0
in the !boot_cpu_has(X86_FEATURE_APIC) && !smp_found_config case, so you
don't fall into that conditional, but it's completely non obvious and does
not really make the code more understandable. Quite the contrary.

> +		disable_apic = 1;
> +		pr_err(FW_BUG "Local APIC %d not detected, force emulation\n",
> +				       boot_cpu_physical_apicid);
> +		return APIC_PIC;
> +	}
> +
> +	/* Has a separate chip ? */
> +	if (!boot_cpu_has(X86_FEATURE_APIC) && !smp_found_config) {
> +		disable_apic = 1;
> +
> +		return APIC_PIC;
> +	}

So if you move exactly that check above the other then it's clear what's
going on.

> +#endif
> +
> +	/* Check MP table or ACPI MADT configuration */
> +	if (!smp_found_config) {
> +		disable_ioapic_support();
> +
> +		if (!acpi_lapic)
> +			pr_info("APIC: ACPI MADT or MP tables are not detected\n");
> +
> +		return APIC_VIRTUAL_WIRE;
> +	}
> +
> +	/* Other checks of APIC options will be done in each setup function */
> +

Please remove the extra new line. It's not helping readability.

> +	return APIC_SYMMETRIC_IO;
> +}

Thanks,

	tglx

  reply	other threads:[~2017-07-02 17:37 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-30  4:07 [PATCH v5 00/12] Unify the interrupt delivery mode and do its setup in advance Dou Liyang
2017-06-30  4:07 ` [PATCH v5 01/12] x86/apic: Construct a selector for the interrupt delivery mode Dou Liyang
2017-07-02 17:37   ` Thomas Gleixner [this message]
2017-07-03  1:44     ` Dou Liyang
2017-06-30  4:07 ` [PATCH v5 02/12] x86/apic: Prepare for unifying the interrupt delivery modes setup Dou Liyang
2017-07-02 17:47   ` Thomas Gleixner
2017-07-03  1:58     ` Dou Liyang
2017-07-03  6:41       ` Thomas Gleixner
2017-07-03  6:47         ` Dou Liyang
2017-06-30  4:07 ` [PATCH v5 03/12] x86/apic: Split local APIC timer setup from the APIC setup Dou Liyang
2017-06-30  4:07 ` [PATCH v5 04/12] x86/apic: Move logical APIC ID away from apic_bsp_setup() Dou Liyang
2017-07-02 17:54   ` Thomas Gleixner
2017-07-03  2:02     ` Dou Liyang
2017-06-30  4:07 ` [PATCH v5 05/12] x86/apic: Unify interrupt mode setup for SMP-capable system Dou Liyang
2017-07-02 18:07   ` Thomas Gleixner
2017-07-03  2:34     ` Dou Liyang
2017-06-30  4:07 ` [PATCH v5 06/12] x86/apic: Mark the apic_intr_mode extern for sanity check cleanup Dou Liyang
2017-06-30  4:07 ` [PATCH v5 07/12] x86/apic: Unify interrupt mode setup for UP system Dou Liyang
2017-07-02 18:19   ` Thomas Gleixner
2017-07-03  2:34     ` Dou Liyang
2017-06-30  4:07 ` [PATCH v5 08/12] x86/ioapic: Refactor the delay logic in timer_irq_works() Dou Liyang
2017-07-02 19:15   ` Thomas Gleixner
2017-07-03  3:23     ` Dou Liyang
2017-06-30  4:07 ` [PATCH v5 09/12] x86/init: add intr_mode_init to x86_init_ops Dou Liyang
2017-07-02 19:16   ` Thomas Gleixner
2017-07-03  3:28     ` Dou Liyang
2017-06-30  4:07 ` [PATCH v5 10/12] x86/xen: Bypass intr mode setup in enlighten_pv system Dou Liyang
2017-07-02 19:18   ` Thomas Gleixner
2017-07-03  3:53     ` Dou Liyang
2017-07-03  6:56       ` Thomas Gleixner
2017-07-03  7:17         ` Dou Liyang
2017-06-30  4:07 ` [PATCH v5 11/12] x86/time: Initialize interrupt mode behind timer init Dou Liyang
2017-07-06 14:54   ` [x86/time] 03fa63cc96: ACPI_Error:Table[DMAR]is_not_invalidated_during_early_boot_stage(#/tbxface-#) kernel test robot
2017-07-06 21:03     ` [x86/time] 03fa63cc96: ACPI_Error:Table[DMAR]is_not_invalidated_during_early_boot_stage(#/tbxface -#) Thomas Gleixner
2017-07-07  1:54       ` Ye Xiaolong
2017-07-07  2:39         ` Dou Liyang
2017-07-07  3:04           ` Ye Xiaolong
2017-07-07  4:46             ` Dou Liyang
2017-06-30  4:07 ` [PATCH v5 12/12] x86/apic: Remove the init_bsp_APIC() Dou Liyang

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