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Date: Sat, 8 Jul 2017 14:08:25 +0200 (CEST)
From: Thomas Gleixner <tglx@linutronix.de>
To: Doug Berger <opendmb@gmail.com>
cc: Marc Zyngier <marc.zyngier@arm.com>,
        Bartosz Golaszewski <brgl@bgdev.pl>,
        Sebastian Frias <sf84@laposte.net>,
        Boris Brezillon <boris.brezillon@free-electrons.com>,
        open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/6] genirq: generic chip: add generic irq_mask_ack
 functions
In-Reply-To: <20170707192016.13001-2-opendmb@gmail.com>
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References: <20170707192016.13001-1-opendmb@gmail.com> <20170707192016.13001-2-opendmb@gmail.com>
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On Fri, 7 Jul 2017, Doug Berger wrote:

> The irq_gc_mask_disable_reg_and_ack() function name implies that it
> provides the combined functions of irq_gc_mask_disable_reg() and
> irq_gc_ack().  However, the implementation does not actually do
> that since it writes the mask instead of the disable register. It
> also does not maintain the mask cache which makes it inappropriate
> to use with other masking functions.
> 
> In addition, commit 659fb32d1b67 ("genirq: replace irq_gc_ack() with
> {set,clr}_bit variants (fwd)") effectively renamed irq_gc_ack() to
> irq_gc_set_bit() so this function probably should have also been
> renamed at that time.
> 
> Since this generic chip code provides three mask functions and two
> ack functions, this commit provides generic implementations for all
> six combinations of the mask and ack functions suitable for use
> with the irq_mask_ack member of the struct irq_chip.

We have exactly one user of irq_gc_mask_disable_reg_and_ack() and that
needs exactly on function as replacement. Why do we need 6 variants of
that right now?

Thanks,

	tglx