From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751926AbdGaIo4 (ORCPT ); Mon, 31 Jul 2017 04:44:56 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:36958 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751157AbdGaIoz (ORCPT ); Mon, 31 Jul 2017 04:44:55 -0400 Date: Mon, 31 Jul 2017 10:44:53 +0200 (CEST) From: Thomas Gleixner To: Benjamin Herrenschmidt cc: Daniel Lezcano , "linux-kernel@vger.kernel.org" Subject: Re: IRQ_ONESHOT expectations vs mask/unmask In-Reply-To: <1501490065.2792.88.camel@kernel.crashing.org> Message-ID: References: <1501477218.2792.84.camel@kernel.crashing.org> <1501490065.2792.88.camel@kernel.crashing.org> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 31 Jul 2017, Benjamin Herrenschmidt wrote: > On Mon, 2017-07-31 at 09:09 +0200, Thomas Gleixner wrote: > > You asked a lot of questions, but you failed to explain the problem for > > XICS. > > I did but maybe it wasn't clear :-) > > "So on some PICs on powerpc, while we do use "fast EOI", we also> > > have a chance of edge interrupts (MSIs) being lost while masked." > > Basically, a masked interrupt might get dropped rather than "latched", > so if we use the existing fasteoi handler with IRQF_ONESHOT, we'll > lose them if they occur at the wrong time. > > I could use something like the edge_eoi flow handler instead I suppose > but that will *never* lazy disable which is somewhat unfortunate, very > fast paced MSIs benefit from being HW masked if we already recorded > that they occurred. > > So what I would need is something along the line of ONESHOT as done in > fasteoi but only for level interrupts. If that MSI interrupt is using a separate interrupt chip, then the solution is simple. You just have to add IRQCHIP_ONESHOT_SAFE to chip.flags Thanks, tglx