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Date: Thu, 12 Oct 2017 17:22:54 +0200 (CEST)
From: Thomas Gleixner <tglx@linutronix.de>
To: Mike Travis <mike.travis@hpe.com>
cc: Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>,
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        Andrew Banman <andrew.banman@hpe.com>,
        Russ Anderson <russ.anderson@hpe.com>, linux-kernel@vger.kernel.org,
        x86@kernel.org
Subject: Re: [PATCH 2/5] x86/kernel: Skip TSC test and error messages if
 already unstable
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On Thu, 12 Oct 2017, Mike Travis wrote:
> On 10/12/2017 4:17 AM, Thomas Gleixner wrote:
> > On Thu, 5 Oct 2017, mike.travis@hpe.com wrote:
> > > @@ -89,6 +93,10 @@ bool tsc_store_and_check_tsc_adjust(bool
> > >   	if (!boot_cpu_has(X86_FEATURE_TSC_ADJUST))
> > >   		return false;
> > >   +	/* Skip unnecessary error messages if TSC already unstable */
> > > +	if (check_tsc_unstable())
> > > +		return false;
> > > +
> > >   	rdmsrl(MSR_IA32_TSC_ADJUST, bootval);
> > >   	cur->bootval = bootval;
> > >   	cur->adjusted = bootval;
> > 
> > This hunk rejects and I really can't figure out against which tree that
> > would apply.
> 
> My current merge tree happens to be 4.13.0-rc1 which was the latest when I
> started this patch submission.  I can update my merge tree and reapply if need
> be?

Please send patches always against top of tree and not some random ancient
version of it.

> > Btw, there are two incarnations of tsc_store_and_check_tsc_adjust().
> > Shouldn't the !SMP variant get the same treatment?
> 
> I could add it though I'm not sure the point?  If it's only one CPU would
> TSC's being out of sync become a question?

Well, this is about TSC_ADJUST and if BIOS/SMM fiddles with TSC_ADJUST
behind the kernels back, then our timekeeping is buggered. So we better
check that.

Thanks,

	tglx