RE: [PATCH V3 1/5] perf/x86/intel/uncore: customized pmu event read for client IMC uncore

[Thomas Gleixner <tglx@linutronix.de>]

On Thu, 2 Nov 2017, Thomas Gleixner wrote:
> On Thu, 2 Nov 2017, Liang, Kan wrote:
> > > On Thu, 2 Nov 2017, Thomas Gleixner wrote:
> > > > On Thu, 2 Nov 2017, Liang, Kan wrote:
> > > > > Patch 5/5 will clean up the client IMC uncore.
> > > > > Before that, we still need it to make client IMC uncore work.
> > > > >
> > > > > This patch isolates the >= case for client IMC uncore.
> > > >
> > > > Fair enough. A comment to that effect (even when removed later) would
> > > > have avoided that question.
> > > 
> > > Thinking more about it. The current code only supports the fixed one, right?
> > > So why would it deal with anything > FIXED?
> > > 
> > 
> > There are two free running counters in IMC.
> > To support the second one, the previous code implicitly do
> > UNCORE_PMC_IDX_FIXED + 1.
> > So it has to deal with > FIXED case.
> > 
> > 	case SNB_UNCORE_PCI_IMC_DATA_READS:
> > 		base = SNB_UNCORE_PCI_IMC_DATA_READS_BASE;
> > 		idx = UNCORE_PMC_IDX_FIXED;
> > 		break;
> > 	case SNB_UNCORE_PCI_IMC_DATA_WRITES:
> > 		base = SNB_UNCORE_PCI_IMC_DATA_WRITES_BASE;
> > 		idx = UNCORE_PMC_IDX_FIXED + 1;
> > 		break;
> > 	default:
> > 		return -EINVAL;
> 
> Fugly that is, but as its cleaned up later....

But then you have this in uncore_perf_event_update():
 
-       if (event->hw.idx >= UNCORE_PMC_IDX_FIXED)
+       if (event->hw.idx == UNCORE_PMC_IDX_FIXED)

So how is that supposed to work?

I think your patch order is wrong and breaks bisectability all over the
place as you fixup the UNCORE_PMC_IDX_FIXED + 1 hackery in 5/5.

Thanks,

	tglx