From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755330AbdKMUZa (ORCPT ); Mon, 13 Nov 2017 15:25:30 -0500 Received: from Galois.linutronix.de ([146.0.238.70]:35013 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752445AbdKMUZY (ORCPT ); Mon, 13 Nov 2017 15:25:24 -0500 Date: Mon, 13 Nov 2017 21:25:15 +0100 (CET) From: Thomas Gleixner To: "Dey, Megha" cc: Peter Zijlstra , Megha Dey , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "linux-doc@vger.kernel.org" , "mingo@redhat.com" , "hpa@zytor.com" , "andriy.shevchenko@linux.intel.com" , "kstewart@linuxfoundation.org" , "Yu, Yu-cheng" , "Brown, Len" , "gregkh@linuxfoundation.org" , "acme@kernel.org" , "alexander.shishkin@linux.intel.com" , "jolsa@redhat.com" , "namhyung@kernel.org" , "vikas.shivappa@linux.intel.com" , "pombredanne@nexb.com" , "me@kylehuey.com" , "bp@suse.de" , "Andrejczuk, Grzegorz" , "Luck, Tony" , "corbet@lwn.net" , "Shankar, Ravi V" Subject: RE: [PATCH V1 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring support In-Reply-To: Message-ID: References: <1510435206-16110-1-git-send-email-megha.dey@linux.intel.com> <1510435206-16110-3-git-send-email-megha.dey@linux.intel.com> <20171113090016.o2l6356ktkgan7ch@hirez.programming.kicks-ass.net> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 13 Nov 2017, Dey, Megha wrote: > >-----Original Message----- > >From: Peter Zijlstra [mailto:peterz@infradead.org] > >Sent: Monday, November 13, 2017 1:00 AM > >To: Megha Dey > >Cc: x86@kernel.org; linux-kernel@vger.kernel.org; linux- Please fix your mail client so it does not add this complete useless information to the reply. > >On Sat, Nov 11, 2017 at 01:20:05PM -0800, Megha Dey wrote: > >> +/* > >> + * Unmask the NMI bit of the local APIC the first time task is > >> +scheduled > >> + * on a particular CPU. > >> + */ > >> +static void intel_bm_unmask_nmi(void) { > >> + this_cpu_write(bm_unmask_apic, 0); > >> + > >> + if (!(this_cpu_read(bm_unmask_apic))) { > >> + apic_write(APIC_LVTPC, APIC_DM_NMI); > >> + this_cpu_inc(bm_unmask_apic); > >> + } > >> +} > > > >What? Why? > > Normally, other drivers using perf create an event on every CPU (thereby > calling perf_init on every CPU), where this bit(APIC_DM_NMI)is explicitly > unmasked. In our driver, we do not do this (since we are worried only > about a particular task) and hence this bit is only disabled on the local > APIC where the perf event is initialized. > > As such, if the task is scheduled out to some other CPU, this bit is set > and hence would stop the interrupt from reaching the processing core. Still that code makes no sense at all and certainly does not do what you claim it does: > >> + this_cpu_write(bm_unmask_apic, 0); > >> + > >> + if (!(this_cpu_read(bm_unmask_apic))) { So first you write the per cpu variable to 0 and then you check whether it is zero, which is pointless obviously. > > > >> +static int intel_bm_event_add(struct perf_event *event, int mode) { Please move the opening bracket of the function into the next line. See the kernel coding style documentation. Thanks, tglx