From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751706AbdKYRZi (ORCPT ); Sat, 25 Nov 2017 12:25:38 -0500 Received: from Galois.linutronix.de ([146.0.238.70]:50107 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751590AbdKYRZh (ORCPT ); Sat, 25 Nov 2017 12:25:37 -0500 Date: Sat, 25 Nov 2017 18:25:33 +0100 (CET) From: Thomas Gleixner To: Nadav Amit cc: LKML , linux-edac@vger.kernel.org, Andy Lutomirski , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Tony Luck , Borislav Petkov , Paolo Bonzini , =?ISO-8859-2?Q?Radim_Kr=E8m=E1=F8?= Subject: Re: [PATCH v2 2/2] x86: disable IRQs before changing CR4 In-Reply-To: <803D7D69-1F01-4CB8-A966-A040F302D1C0@gmail.com> Message-ID: References: <20171125032907.2241-1-namit@vmware.com> <20171125032907.2241-3-namit@vmware.com> <803D7D69-1F01-4CB8-A966-A040F302D1C0@gmail.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 25 Nov 2017, Nadav Amit wrote: > Thomas Gleixner wrote: > > > On Fri, 24 Nov 2017, Nadav Amit wrote: > >> /* Set in this cpu's CR4. */ > >> -static inline void cr4_set_bits(unsigned long mask) > >> +static inline void cr4_set_bits_irqs_off(unsigned long mask) > > > > This change is kinda weird. I'd expect that there is a corresponding > > function cr4_set_bits() which takes care of disabling interrupts. But there > > is not. All it does is creating a lot of pointless churn. > > > >> static __always_inline void setup_smep(struct cpuinfo_x86 *c) > >> static __init int setup_disable_smap(char *arg) > >> static __always_inline void setup_pku(struct cpuinfo_x86 *c) > > > > Why are you not doing this at the call site around all calls which fiddle > > with cr4, i.e. in identify_cpu() ? > > > > identify_cpu() is called from two places: > > > > identify_boot_cpu() and identify_secondary_cpu() > > > > identify_secondary_cpu is called with interrupts disabled anyway and there > > is no reason why we can't enforce interrupts being disabled around > > identify_cpu() completely. > > > > But if we actually do the right thing, i.e. having cr4_set_bit() and > > cr4_set_bit_irqsoff() all of this churn goes away magically. > > > > Then the only place which needs to be changed is the context switch because > > here interrupts are already disabled and we really care about performance. > > > >> @@ -293,7 +303,7 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p, > >> } > >> > >> if ((tifp ^ tifn) & _TIF_NOTSC) > >> - cr4_toggle_bits(X86_CR4_TSD); > >> + cr4_toggle_bits_irqs_off(X86_CR4_TSD); > > You make a good point. I will add cr4_set_bit(). I will leave identify_cpu() > as is, since it is rather hard to maintain code that enables/disables irqs > at one point and rely on these operations at a completely different place. > As you said, it is less of an issue once cr4_set_bit() and friends are > introduced. I fixed that up already as I wanted to have it done, see the tip-bot mail in your inbox. Thanks, tglx