From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752245AbeACNRI (ORCPT + 1 other); Wed, 3 Jan 2018 08:17:08 -0500 Received: from Galois.linutronix.de ([146.0.238.70]:39391 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751344AbeACNRH (ORCPT ); Wed, 3 Jan 2018 08:17:07 -0500 Date: Wed, 3 Jan 2018 14:17:00 +0100 (CET) From: Thomas Gleixner To: Borislav Petkov cc: Meelis Roos , Linux Kernel list , x86@kernel.org, linux-edac@vger.kernel.org, Tom Lendacky Subject: Re: 4.15-rc6 PTI regression: L1 TLB mismatch MCE on Athlon64 In-Reply-To: <20180103124206.sprpyz6lkwvsl7mw@pd.tnic> Message-ID: References: <20180102212706.5gtevvg4rr7rfy5o@pd.tnic> <20180103124206.sprpyz6lkwvsl7mw@pd.tnic> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Wed, 3 Jan 2018, Borislav Petkov wrote: > On Wed, Jan 03, 2018 at 11:16:48AM +0200, Meelis Roos wrote: > > ---[ ESPfix Area ]--- > > 0xffffff0000000000-0xffffff1800000000 96G pud > > 0xffffff1800000000-0xffffff1800009000 36K pte > > 0xffffff1800009000-0xffffff180000a000 4K ro NX pte > > 0xffffff180000a000-0xffffff1800019000 60K pte > > 0xffffff1800019000-0xffffff180001a000 4K ro NX pte > > 0xffffff180001a000-0xffffff1800029000 60K pte > > 0xffffff1800029000-0xffffff180002a000 4K ro NX pte > > 0xffffff180002a000-0xffffff1800039000 60K pte > > 0xffffff1800039000-0xffffff180003a000 4K ro NX pte > > 0xffffff180003a000-0xffffff1800049000 60K pte > > 0xffffff1800049000-0xffffff180004a000 4K ro NX pte > > 0xffffff180004a000-0xffffff1800059000 60K pte > > 0xffffff1800059000-0xffffff180005a000 4K ro NX pte > > 0xffffff180005a000-0xffffff1800069000 60K pte > > 0xffffff1800069000-0xffffff180006a000 4K ro NX pte > > 0xffffff180006a000-0xffffff1800079000 60K pte > > ... 131059 entries skipped ... > > ---[ High Kernel Mapping ]--- > > 0xffffffff80000000-0xffffffff81e00000 30M pmd > > 0xffffffff81e00000-0xffffffff82000000 2M ro PSE GLB x pmd > > Ha, this must be it. What I said yesterday about the guard hole > hypervisor range was wrong because we're looking at VA slice [47:12] and > this one matches: That's the entry area, which is mapped into kernel _AND_ user space. Now that's special because we switch CR3 while we are executing there. And this one is: 0xffffffff81e00000-0xffffffff82000000 2M ro PSE GLB x pmd and the one we switch to is: 0xffffffff81000000-0xffffffff82000000 16M ro PSE x pmd Meelis, does the patch below fix it for you? Thanks, tglx 8<------------------- --- a/arch/x86/mm/pti.c +++ b/arch/x86/mm/pti.c @@ -367,7 +367,8 @@ static void __init pti_setup_espfix64(vo static void __init pti_clone_entry_text(void) { pti_clone_pmds((unsigned long) __entry_text_start, - (unsigned long) __irqentry_text_end, _PAGE_RW); + (unsigned long) __irqentry_text_end, + _PAGE_RW | _PAGE_GLOBAL); } /*