From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x224w2owd4L/W+BkasDBXEDSsTg3ndkBbYx6xHh8ndhgOUESF0KLM5OsQMj9TfbCHLh5kHDpW ARC-Seal: i=1; a=rsa-sha256; t=1517386040; cv=none; d=google.com; s=arc-20160816; b=MyUGOrmBMFiqeTQ5m/Lm1NVjkEcgtywJHY5+F9M34qckEEYv7ehIK8lEpFROyIoxF+ YgBmHhDguBnQDWTGvzHn/OTpWY7/NV1lGhigiPkZHhKfXB8Rdlo5riTOCRhChmZcWj+B 04brZP+Ez3hAMiZnkj5OAP74G+BufO1ijYaiZRGdE127rZY27l4uTN8c6BqK6dX2bY3q PG33gbkKtRavN98JOx8EXq/TkfGKYsA+OJd7rvbpHqSqj3F/ce0FeFNrKd3cXzaXl5w2 H5SaHmRuFOUWIgSa3PxaZTkqnX16I/TKRtVv38BrkaKafBd1sV/9RycLNLz1RuBmyDlv Y/RQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:user-agent:references:message-id:in-reply-to:subject :cc:to:from:date:arc-authentication-results; bh=/3YRqr22BSQ7jut8hzZzo0sfU/y4jmjGHEt49hjVzag=; b=p2NeUZ15CHRca3jWZHDeA6/8nF6POYyX0t8FueqOWHFb/+ksmW+MeOZO9J9/lSP7jy 6AeYJhiWn7/Xo9CrYhL6f+CyLIf0mNECk65olrkk6kqq2WL9C3jqHpmkiWfIwwbaeSDj jQwfDKnQ04gJueKcI83a8yjC4LIuAHaS3LH3aevN6iRixiJfEN0UZj0j22UTsK37G2/0 Bke0UWTJBHFnZKK1EThSRznJtqtgYekyDyKIlj0CMOaMlwv5Kv8OgyBiSRpiD2v66bFq axfUykLSzjV7J6mo6RV1dDMtjZJXsTvcggsqKXerL/YVUU9PxgbdRwRAiyhMGhT2S2+p tqRQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of tglx@linutronix.de designates 2a01:7a0:2:106d:700::1 as permitted sender) smtp.mailfrom=tglx@linutronix.de Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of tglx@linutronix.de designates 2a01:7a0:2:106d:700::1 as permitted sender) smtp.mailfrom=tglx@linutronix.de Date: Wed, 31 Jan 2018 09:07:10 +0100 (CET) From: Thomas Gleixner To: Dan Williams cc: Ingo Molnar , linux-arch , Kernel Hardening , Andrew Honig , Linux Kernel Mailing List , Greg KH , Paolo Bonzini , Alan Cox , Linus Torvalds , Jim Mattson Subject: Re: [PATCH v6 11/13] kvm, x86: update spectre-v1 mitigation In-Reply-To: Message-ID: References: <151727412964.33451.17213780323040673404.stgit@dwillia2-desk3.amr.corp.intel.com> <151727419015.33451.13762926723789552997.stgit@dwillia2-desk3.amr.corp.intel.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590977874221284170?= X-GMAIL-MSGID: =?utf-8?q?1591094584308593600?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Tue, 30 Jan 2018, Dan Williams wrote: > On Mon, Jan 29, 2018 at 5:03 PM, Dan Williams wrote: > > Commit 75f139aaf896 "KVM: x86: Add memory barrier on vmcs field lookup" > > added a raw 'asm("lfence");' to prevent a bounds check bypass of > > 'vmcs_field_to_offset_table'. We can save an lfence in this path and > > just use the common array_index_nospec() helper designed for these types > > of fixes. > > > > Cc: Andrew Honig > > Cc: Jim Mattson > > Acked-by: Paolo Bonzini > > Signed-off-by: Dan Williams > > > Hi Thomas, > > I notice this one missing from -tip, I suspect because of the > collision with the raw 'lfence' that is in current mainline? No > worries, I'll send a rebased fixup to Paolo directly once > array_idx_nospec() goes upstream. It did not apply for that reason and I'm still trying to keep x86/pti as clean as it goes to keep GregKHs backporting hell somehow under control. Sorry, I wanted to reply on that, but then my brain shut down after pushing it out. Thanks, tglx