Re: [PATCH v2] KVM: Expose the split lock detection feature to guest VM

[Thomas Gleixner <tglx@linutronix.de>]

On Wed, 4 Jul 2018, Paolo Bonzini wrote:
> On 04/07/2018 15:06, Jingqi Liu wrote:
> > A new control bit(bit 29) in the TEST_CTRL MSR will be introduced
> > to enable detection of split locks.
> > 
> > When bit 29 of the TEST_CTRL(33H) MSR is set, the processor
> > causes an #AC exception to be issued instead of suppressing LOCK on
> > bus(during split lock access). A previous control bit (bit 31)
> > in this MSR causes the processor to disable LOCK# assertion for
> > split locked accesses when set. When bits 29 and 31 are both set,
> > bit 29 takes precedence.
> > 
> > The release document ref below link:
> > https://software.intel.com/sites/default/files/managed/c5/15/\
> > architecture-instruction-set-extensions-programming-reference.pdf
> > This patch has a dependency on https://lkml.org/lkml/2018/5/27/78.

That dependency is useless, because that series is going nowhere.

> > Signed-off-by: Jingqi Liu <jingqi.liu@intel.com>
> > ---
> >  arch/x86/include/asm/kvm_host.h |  1 +
> >  arch/x86/kvm/vmx.c              | 77 +++++++++++++++++++++++++++++++++++++++++
> >  arch/x86/kvm/x86.c              | 10 ++++++
> >  arch/x86/kvm/x86.h              |  5 +++
> >  include/uapi/linux/kvm.h        |  1 +
> >  5 files changed, 94 insertions(+)
> 
> Checking for split lock is done with the MSR_TEST_CTL too, so you should
> not use a capability to expose the availability to KVM userspace.
> Instead you should expose the contents of MSR_TEST_CTL on the host, in a
> similar way to https://marc.info/?l=kvm&m=152998661713547&w=2.
> 
> Please coordinate with Robert Hu on the QEMU patches too, because he's
> working on the infrastructure to use KVM_GET_MSR_FEATURE_INDEX_LIST in QEMU.

Can we please sort out the whole AC mess on the host first including the
detection stuff?

There is no rush for this to be in KVM/QEMU now because all what exists for
this new split lock thing is 'silicon' running on an emulator. And w/o
support in the kernel proper this is completely useless.

So this needs the following things:

  1) Proper enumeration via CPUID or MISC_FEATURES. The current detection
     hack is just broken.
  
  2) A proper host side implementation, which then automatically makes the
     stuff usable in a guest once it is exposed.

  3) A proper way how to expose MSR_TEST_CTL to the guest, but surely not
     with extra split_lock_ctrl voodoo. It's an MSR nothing else. KVM/QEMU
     have standartized ways to deal with MSRs and the required selective
     bitwise access control.

Thanks,

	tglx