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[73.95.159.87]) by smtp.gmail.com with ESMTPSA id s3sm88083226iob.49.2019.08.13.10.44.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Aug 2019 10:44:03 -0700 (PDT) Date: Tue, 13 Aug 2019 10:44:02 -0700 (PDT) From: Paul Walmsley X-X-Sender: paulw@viisi.sifive.com To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org cc: Christoph Hellwig , Palmer Dabbelt , Damien Le Moal , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 01/15] irqchip/sifive-plic: set max threshold for ignored handlers In-Reply-To: <20190813154747.24256-2-hch@lst.de> Message-ID: References: <20190813154747.24256-1-hch@lst.de> <20190813154747.24256-2-hch@lst.de> User-Agent: Alpine 2.21.9999 (DEB 301 2018-08-15) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Thomas, Jason, Marc, On Tue, 13 Aug 2019, Christoph Hellwig wrote: > When running in M-mode we still the S-mode plic handlers in the DT. > Ignore them by setting the maximum threshold. > > Signed-off-by: Christoph Hellwig If you're happy with this, could one of you ack it so we can merge it with the rest of this series through the RISC-V tree? thanks - Paul > --- > drivers/irqchip/irq-sifive-plic.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c > index cf755964f2f8..c72c036aea76 100644 > --- a/drivers/irqchip/irq-sifive-plic.c > +++ b/drivers/irqchip/irq-sifive-plic.c > @@ -244,6 +244,7 @@ static int __init plic_init(struct device_node *node, > struct plic_handler *handler; > irq_hw_number_t hwirq; > int cpu, hartid; > + u32 threshold = 0; > > if (of_irq_parse_one(node, i, &parent)) { > pr_err("failed to parse parent for context %d.\n", i); > @@ -266,10 +267,16 @@ static int __init plic_init(struct device_node *node, > continue; > } > > + /* > + * When running in M-mode we need to ignore the S-mode handler. > + * Here we assume it always comes later, but that might be a > + * little fragile. > + */ > handler = per_cpu_ptr(&plic_handlers, cpu); > if (handler->present) { > pr_warn("handler already present for context %d.\n", i); > - continue; > + threshold = 0xffffffff; > + goto done; > } > > handler->present = true; > @@ -279,8 +286,9 @@ static int __init plic_init(struct device_node *node, > handler->enable_base = > plic_regs + ENABLE_BASE + i * ENABLE_PER_HART; > > +done: > /* priority must be > threshold to trigger an interrupt */ > - writel(0, handler->hart_base + CONTEXT_THRESHOLD); > + writel(threshold, handler->hart_base + CONTEXT_THRESHOLD); > for (hwirq = 1; hwirq <= nr_irqs; hwirq++) > plic_toggle(handler, hwirq, 0); > nr_handlers++; > -- > 2.20.1 > >