From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932502AbZICXVj (ORCPT ); Thu, 3 Sep 2009 19:21:39 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755312AbZICXVi (ORCPT ); Thu, 3 Sep 2009 19:21:38 -0400 Received: from eddie.linux-mips.org ([78.24.191.182]:38954 "EHLO eddie.linux-mips.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755299AbZICXVi (ORCPT ); Thu, 3 Sep 2009 19:21:38 -0400 Date: Fri, 4 Sep 2009 00:21:39 +0100 (BST) From: "Maciej W. Rozycki" To: Rakib Mullick cc: LKML , x86@kernel.org, Ingo Molnar Subject: Re: [Question] x86,APIC: In apicdef.h dfr,svr,...... shouldn't be const? In-Reply-To: Message-ID: References: User-Agent: Alpine 2.00 (LFD 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 4 Sep 2009, Rakib Mullick wrote: > > All the three have meaningful semantics on writes at least on some > > versions of the APIC (they either have writable fields or trigger side > > effects on writes). It looks like your documentation is wrong (not > > unheard of with Intel). > > Thanks, Maciej. If my documentation is wrong, then which documentation > should I follow? Isn't there any well defined document? You may have to track down an older revision of the document or that for an older CPU. These registers may have changed as the architecture evolved and while Linux supports all the APIC versions, Intel may have omitted details for earlier implementations either deliberately or accidentally. Maciej