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From: Thomas Gleixner <tglx@linutronix.de>
To: Chris Metcalf <cmetcalf@tilera.com>
Cc: linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arch/tile: Enable more sophisticated IRQ model for 32-bit chips.
Date: Fri, 25 Jun 2010 23:22:44 +0200 (CEST)	[thread overview]
Message-ID: <alpine.LFD.2.00.1006252320430.18683@localhost.localdomain> (raw)
In-Reply-To: <201006252110.o5PLAovH010769@farm-0002.internal.tilera.com>

Chris,

On Fri, 25 Jun 2010, Chris Metcalf wrote:

> This model is based on the on-chip interrupt model used by the
> TILE-Gx next-generation hardware, and interacts much more cleanly
> with the Linux generic IRQ layer.
> 
> The change includes modifications to the Tilera hypervisor, which
> are reflected in the hypervisor headers in arch/tile/include/arch/.

can you please cc me on irq related changes ? Also I'd prefer a combo
patch of the irq code which lets me see the full story w/o going to
pull another git tree from somewhere.

Thanks,

	tglx

  reply	other threads:[~2010-06-25 21:22 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-06-25 20:41 Chris Metcalf
2010-06-25 21:22 ` Thomas Gleixner [this message]
2010-06-25 21:32   ` Chris Metcalf
2010-06-25 21:42     ` Thomas Gleixner

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