From: Thomas Gleixner <tglx@linutronix.de>
To: "Schaefer Dr, Frank-Rene ()" <fschaef9@visteon.com>
Cc: linux-kernel@vger.kernel.org
Subject: RE: Interrupt Latencies
Date: Tue, 22 Feb 2011 18:17:25 +0100 (CET) [thread overview]
Message-ID: <alpine.LFD.2.00.1102221814430.2701@localhost6.localdomain6> (raw)
In-Reply-To: <060E4307CE6CA14BB4F7B4A25ECA052904BB6E98@VEUMBV03.vistcorp.ad.visteon.com>
On Tue, 22 Feb 2011, Schaefer Dr, Frank-Rene () wrote:
Please do not top post.
> We are using GPIO pins and map them to IRQ.
How are the GPIO pins accessed ? Are they memory mapped registers or what ?
> The underlying driver seems to use message signaled interrupts.
That does not answer which driver is involved. W/o seing the code I
can't tell much.
Thanks,
tglx
prev parent reply other threads:[~2011-02-22 17:17 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-22 9:35 Schaefer Dr, Frank-Rene ()
2011-02-22 12:33 ` Clemens Ladisch
2011-02-24 8:01 ` Schaefer Dr, Frank-Rene ()
2011-02-24 12:18 ` Thomas Gleixner
2011-02-22 14:39 ` Thomas Gleixner
2011-02-22 16:10 ` Schaefer Dr, Frank-Rene ()
2011-02-22 17:17 ` Thomas Gleixner [this message]
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