Re: [PATCH 1/8] x86, apic.c: Disable irq0 if CPU enables ARAT for local apic timer

[Thomas Gleixner <tglx@linutronix.de>]

On Wed, 5 Oct 2011, Fenghua Yu wrote:

> From: Fenghua Yu <fenghua.yu@intel.com>
> 
> irq0 won't generate any interrupt after local apic timers is enabled and ARAT
> is enabled. Disable irq0 in this case. Thus irq0 won't block BSP offline.

Why would it do so ?
 
> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
> ---
>  arch/x86/kernel/apic/apic.c |    5 +++++
>  1 files changed, 5 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
> index 52fa563..8813acf 100644
> --- a/arch/x86/kernel/apic/apic.c
> +++ b/arch/x86/kernel/apic/apic.c
> @@ -506,6 +506,7 @@ static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
>  static void __cpuinit setup_APIC_timer(void)
>  {
>  	struct clock_event_device *levt = &__get_cpu_var(lapic_events);
> +	int cpu = smp_processor_id();
>  
>  	if (this_cpu_has(X86_FEATURE_ARAT)) {
>  		lapic_clockevent.features &= ~CLOCK_EVT_FEAT_C3STOP;
> @@ -517,6 +518,10 @@ static void __cpuinit setup_APIC_timer(void)
>  	levt->cpumask = cpumask_of(smp_processor_id());
>  
>  	clockevents_register_device(levt);
> +
> +	/* irq0 won't be used any more if CPU supports ARAT feature. */
> +	if (cpu == 0 && this_cpu_has(X86_FEATURE_ARAT))
> +		disable_irq(0);

This is completely wrong. If we want to shut that interrupt down, then
we do it in the clockevents set mode functions of PIT or HPET and not
at some random place in the apic timer code.

Thanks,

	tglx