From: Nicolas Pitre <nicolas.pitre@linaro.org>
To: Cyril Chemparathy <cyril@ti.com>
Cc: linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, arnd@arndb.de,
catalin.marinas@arm.com, davidb@codeaurora.org,
frank.rowand@am.sony.com, hsweeten@visionengravers.com,
linus.walleij@linaro.org, marc.zyngier@arm.com,
paul.gortmaker@windriver.com, plagnioj@jcrosoft.com,
rabin@rab.in, rmallon@gmail.com, rob.herring@calxeda.com,
sboyd@codeaurora.org, sjg@chromium.org, tglx@linutronix.de,
tj@kernel.org, vincent.guittot@linaro.org, vitalya@ti.com,
will.deacon@arm.com, grant.likely@secretlab.ca
Subject: Re: [PATCH v3 RESEND 05/17] ARM: LPAE: support 64-bit virt_to_phys patching
Date: Sat, 22 Sep 2012 11:24:53 -0400 (EDT) [thread overview]
Message-ID: <alpine.LFD.2.02.1209221124060.6667@xanadu.home> (raw)
In-Reply-To: <1348242975-19184-6-git-send-email-cyril@ti.com>
On Fri, 21 Sep 2012, Cyril Chemparathy wrote:
> This patch adds support for 64-bit physical addresses in virt_to_phys()
> patching. This does not do real 64-bit add/sub, but instead patches in the
> upper 32-bits of the phys_offset directly into the output of virt_to_phys.
>
> There is no corresponding change on the phys_to_virt() side, because
> computations on the upper 32-bits would be discarded anyway.
>
> Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
> ---
> arch/arm/include/asm/memory.h | 38 ++++++++++++++++++++++++++++++++++++--
> arch/arm/kernel/head.S | 4 ++++
> arch/arm/kernel/setup.c | 2 +-
> 3 files changed, 41 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
> index 88ca206..f3e8f88 100644
> --- a/arch/arm/include/asm/memory.h
> +++ b/arch/arm/include/asm/memory.h
> @@ -154,13 +154,47 @@
> #ifdef CONFIG_ARM_PATCH_PHYS_VIRT
>
> extern unsigned long __pv_offset;
> -extern unsigned long __pv_phys_offset;
> +extern phys_addr_t __pv_phys_offset;
> #define PHYS_OFFSET __virt_to_phys(PAGE_OFFSET)
>
> static inline phys_addr_t __virt_to_phys(unsigned long x)
> {
> - unsigned long t;
> + phys_addr_t t;
> +
> +#ifndef CONFIG_ARM_LPAE
> early_patch_imm8("add", t, x, __pv_offset, 0);
> +#else
> + unsigned long __tmp;
> +
> +#ifndef __ARMEB__
> +#define PV_PHYS_HIGH "(__pv_phys_offset + 4)"
> +#else
> +#define PV_PHYS_HIGH "__pv_phys_offset"
> +#endif
> +
> + early_patch_stub(
> + /* type */ PATCH_IMM8,
> + /* code */
> + "ldr %[tmp], =__pv_offset\n"
> + "ldr %[tmp], [%[tmp]]\n"
> + "add %Q[to], %[from], %[tmp]\n"
> + "ldr %[tmp], =" PV_PHYS_HIGH "\n"
> + "ldr %[tmp], [%[tmp]]\n"
> + "mov %R[to], %[tmp]\n",
> + /* pad */ 4,
> + /* patch_data */
> + ".long __pv_offset\n"
> + "add %Q[to], %[from], %[imm]\n"
> + ".long " PV_PHYS_HIGH "\n"
> + "mov %R[to], %[imm]\n",
> + /* operands */
> + : [to] "=r" (t),
> + [tmp] "=&r" (__tmp)
> + : [from] "r" (x),
> + [imm] "I" (__IMM8),
> + "i" (&__pv_offset),
> + "i" (&__pv_phys_offset));
> +#endif
> return t;
> }
>
> diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
> index 69a3c09..61fb8df 100644
> --- a/arch/arm/kernel/head.S
> +++ b/arch/arm/kernel/head.S
> @@ -530,7 +530,11 @@ ENDPROC(__fixup_pv_offsets)
>
> .align
> 1: .long .
> +#if defined(CONFIG_ARM_LPAE) && defined(__ARMEB__)
> + .long __pv_phys_offset + 4
> +#else
> .long __pv_phys_offset
> +#endif
> .long __pv_offset
> .long PAGE_OFFSET
> #endif
> diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
> index 59e0f57..edb4f42 100644
> --- a/arch/arm/kernel/setup.c
> +++ b/arch/arm/kernel/setup.c
> @@ -159,7 +159,7 @@ DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
> * The initializers here prevent these from landing in the BSS section.
> */
> unsigned long __pv_offset = 0xdeadbeef;
> -unsigned long __pv_phys_offset = 0xdeadbeef;
> +phys_addr_t __pv_phys_offset = 0xdeadbeef;
> EXPORT_SYMBOL(__pv_phys_offset);
>
> #endif
> --
> 1.7.9.5
>
next prev parent reply other threads:[~2012-09-22 15:24 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-21 15:55 [PATCH v3 RESEND 00/17] LPAE fixes and extensions for Keystone Cyril Chemparathy
2012-09-21 15:55 ` [PATCH v3 RESEND 01/17] ARM: add mechanism for late code patching Cyril Chemparathy
2012-09-22 15:10 ` Nicolas Pitre
2012-09-22 21:41 ` Cyril Chemparathy
2012-09-24 12:06 ` Dave Martin
2012-09-24 14:49 ` Cyril Chemparathy
2012-09-24 15:54 ` Dave Martin
2012-09-21 15:56 ` [PATCH v3 RESEND 02/17] ARM: add self test for runtime patch mechanism Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 03/17] ARM: use late patch framework for phys-virt patching Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 04/17] ARM: LPAE: use phys_addr_t on virt <--> phys conversion Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 05/17] ARM: LPAE: support 64-bit virt_to_phys patching Cyril Chemparathy
2012-09-22 15:24 ` Nicolas Pitre [this message]
2012-09-24 16:31 ` Dave Martin
2012-09-24 16:51 ` Nicolas Pitre
2012-09-21 15:56 ` [PATCH v3 RESEND 06/17] ARM: LPAE: use signed arithmetic for mask definitions Cyril Chemparathy
2012-09-24 13:54 ` Russell King - ARM Linux
2012-09-21 15:56 ` [PATCH v3 RESEND 07/17] ARM: LPAE: use phys_addr_t in alloc_init_pud() Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 08/17] ARM: LPAE: use phys_addr_t in free_memmap() Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 09/17] ARM: LPAE: use phys_addr_t for initrd location and size Cyril Chemparathy
2012-09-24 13:38 ` Russell King - ARM Linux
2012-09-24 14:00 ` Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 10/17] ARM: LPAE: use phys_addr_t in switch_mm() Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 11/17] ARM: LPAE: use 64-bit accessors for TTBR registers Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 12/17] ARM: LPAE: define ARCH_LOW_ADDRESS_LIMIT for bootmem Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 13/17] ARM: LPAE: factor out T1SZ and TTBR1 computations Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 14/17] ARM: LPAE: accomodate >32-bit addresses for page table base Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 15/17] ARM: mm: use physical addresses in highmem sanity checks Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 16/17] ARM: mm: cleanup checks for membank overlap with vmalloc area Cyril Chemparathy
2012-09-21 15:56 ` [PATCH v3 RESEND 17/17] ARM: mm: clean up membank size limit checks Cyril Chemparathy
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