From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753979AbbIHI1r (ORCPT ); Tue, 8 Sep 2015 04:27:47 -0400 Received: from fish.king.net.pl ([79.190.246.46]:47314 "EHLO king.net.pl" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751952AbbIHI1n (ORCPT ); Tue, 8 Sep 2015 04:27:43 -0400 X-Greylist: delayed 1179 seconds by postgrey-1.27 at vger.kernel.org; Tue, 08 Sep 2015 04:27:42 EDT Date: Tue, 8 Sep 2015 10:04:19 +0200 (CEST) From: Paul Osmialowski X-X-Sender: newchief@localhost.localdomain To: Linus Walleij cc: Paul Osmialowski , Sascha Hauer , Shawn Guo , Arnd Bergmann , Geert Uytterhoeven , Greg Kroah-Hartman , Guenter Roeck , Haojian Zhuang , Ian Campbell , Jingchang Lu , Jiri Slaby , Kees Cook , Kumar Gala , Laurent Pinchart , Magnus Damm , Michael Turquette , Nathan Lynch , Nicolas Pitre , Maxime Coquelin stm32 , Olof Johansson , Paul Bolle , Rob Herring , Russell King , Simon Horman , Stefan Agner , Stephen Boyd , Uwe Kleine-Koenig , Catalin Marinas , Dave Martin , Mark Rutland , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , linux-clk@vger.kernel.org, "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" Subject: Re: [PATCH 7/9] arm: twr-k70f120m: IOMUX driver for Kinetis SoC In-Reply-To: Message-ID: References: <1435094387-20146-1-git-send-email-pawelo@king.net.pl> <1435094387-20146-8-git-send-email-pawelo@king.net.pl> User-Agent: Alpine 2.00 (LNX 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Linus, On Tue, 14 Jul 2015, Linus Walleij wrote: > OK... > > I want Shawn and Sascha to look at this as they worked with > other Freescale pin controllers. Especially I want to know if this > is a sibling to the other Freescale controllers or a separate hardware. > > If it is *not* a sibling I will *insist* that it use more generic pin > control bindings and move away from the older Freescale-specific > stuff. No one answered me about that. However, I looked at other Freescale pinctrl drivers and realised that no one of them (IMX, IMX1, MXS) is similar to what I need to do for Kinetis, also positions of configuration bits differ significantly. > > There exist generic pin config bindings, see > Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt > > I suggest to to function+group paring and then use generic pin config > with this driver unless it is a very close sibling to the existing Freescale > pin controllers. > > Hint: if it is a sibling, it should share code with them. > > There are several drivers doing generic pin control/pin config in the kernel > tree. > I tried to analyze few of the drivers (e.g. zynq family) and can't find how can I assing clock gate (clock device) to each port (PORTA, PORTB, PORTC,...) which is required for Kinetis. Is generic pin control capable to express that requirement or is it a time to desing my own pinctrl driver (maybe somewhat improved than the one I presented so far)? This pinctrl component is somwehat critical part of BSP. Until it is not sorted, I don't see a point in releasing what was developed so far. Best regards, Paul