From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f200.google.com (mail-pg1-f200.google.com [209.85.215.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6929124E4C3 for ; Fri, 24 Jul 2026 01:12:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.200 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784855567; cv=none; b=BAa2ApdqE2RqQbiGFx2ZiRUFwQXrgn7dgwSeyFfksH+2rkWAJ5036+ZhI5K4ZJD9HLfqKm8+Tlr4w+fjRqm4/meoIJt+yWWNfEcPF9W/Ho5dRfsrPUS1h7cr/sCXcTsSABhGzBU/q0p9CPFgdQ1j1sajL5pHmbf5bHiNCoW+uN0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784855567; c=relaxed/simple; bh=/mhnRNSnLBDMjExs1PH67ByFdgbYgoty3Np4kdyTypU=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=QrpsEZ1FltCmmieEZNx3Q5dlP9c/qzzBGoi6OLi+HdpQ0YkPhGO5k5x7tGWWqrtMnqlqg2wpnP1W7IL2sCvjK0S01Q1JCNVzxStnq/0aW6dTWmV6SZ/UgyFQ6zRiSlm0uINTxKjkoHuikuExIMdsUINwSZS8o6fwO4RsMSKt9oc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=vE2gv3LJ; arc=none smtp.client-ip=209.85.215.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="vE2gv3LJ" Received: by mail-pg1-f200.google.com with SMTP id 41be03b00d2f7-c860544c077so2996191a12.3 for ; Thu, 23 Jul 2026 18:12:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1784855566; x=1785460366; darn=vger.kernel.org; h=content-transfer-encoding:content-type:cc:to:from:subject :message-id:references:mime-version:in-reply-to:date:from:to:cc :subject:date:message-id:reply-to:content-type; bh=Fhwy4P5UTqAyY62fJ3HHPirUxt0rCfq7RQLtlvv/2F0=; b=vE2gv3LJEHtOM63AqxiLqLDECxq1DsUop4KBO5Qs3McdPcA18RM6P6GZmwkTPsYu+i d48hTNcp1s7IIjz9XMaJcEq4IvhBxG3bafqVAlqX7XOGZzBJ+O1tI2fUr9pVBCJ2Rr48 rCY7bdFLFYgHT5dVZd/bb83UoiJraZewIjEul0C52BXiP3QevvtP6mIf16b2oANRH9xB +DbhaAL7cZ1K9CEMDUgjDwwrLdSAaKYlM51NTLhb6e3zvxbMfjZ/2wyodMza9f6h+Gn+ cAAH7FSwzSsaCvog3guoWxK/xE4yjfdEtnpAsCGczEMSrO0VwZ1uoI8+PHADrLYYg4xE CQ4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784855566; x=1785460366; h=content-transfer-encoding:content-type:cc:to:from:subject :message-id:references:mime-version:in-reply-to:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=Fhwy4P5UTqAyY62fJ3HHPirUxt0rCfq7RQLtlvv/2F0=; b=VCfVAJ2OH8fYAiFlrF2aYemYfwoOY8G4i9GskvRITdJaP9biTub88o1eOiymmz/16t ueX/nGVvAi5yYfDMCzhYIhxPbRq/9yu1EaRWgmpUAfpGWooOW/7miQBoF64XIl5N1mHF xXH6Ma+41NTthx5bStl7d4tBURiMFkWobUt5Oh7AJZtTWfUGYpBy0b/xdToqcwlHnn/l s9l4OzsE9ut6vH7Tvf3Ij2kn08N+fIPRgp+GXM07PZNe1Frye+11kATVvrA2klkICn1y 4+3Ac8NX+RrELV0qHYnFJLJuOMGtbB81oLFjW6kX0Vk81x/CcfxlwofV/Yg+Ma+1bEvz GeQw== X-Forwarded-Encrypted: i=1; AHgh+RrSbPzY0MlPyv7gOIOKobAFw/6q0Q+kuTeqq9XueVfPb2ccAO9CJ1YMTMjvqJq4qtqbxRmkT1qmlp6GCRg=@vger.kernel.org X-Gm-Message-State: AOJu0YzjmKN379oHm9qQcO5W7wLyNk8HlwM0FC4XYO9H+8uKczCWFD0b rARG4b8xPuPDrD9DT7ORZ4pag0r2cq5cvPYhJtsBNi9E8xtJ4YCt5NEFj5CRNeGe6cen1omdoGf DUHI0pA== X-Received: from pgbcr2.prod.google.com ([2002:a05:6a02:4102:b0:c96:a49d:98ce]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a21:4d02:b0:3c4:396d:4a6c with SMTP id adf61e73a8af0-3c44afb90b4mr5628190637.5.1784855565462; Thu, 23 Jul 2026 18:12:45 -0700 (PDT) Date: Thu, 23 Jul 2026 18:12:44 -0700 In-Reply-To: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260616004155.1435766-1-yosry@kernel.org> <20260616004155.1435766-23-yosry@kernel.org> Message-ID: Subject: Re: [RFC PATCH v2 22/25] KVM: x86/mmu: Refactor kvm_mmu_invlpg() to allow skipping the gva flush From: Sean Christopherson To: Yosry Ahmed Cc: Paolo Bonzini , Jim Mattson , Maxim Levitsky , Vitaly Kuznetsov , Tom Lendacky , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Thu, Jul 23, 2026, Yosry Ahmed wrote: > On Thu, Jul 23, 2026 at 3:03=E2=80=AFPM Sean Christopherson wrote: > > > > On Thu, Jul 23, 2026, Yosry Ahmed wrote: > > > > Actually, isn't there a pre-existing over-flush when handling kvm_m= mu_invpcid_gva()? > > > > Oof, and a missed flush? > > > > > > > > To fix the over-flush, I think we want this? > > > > > > > > diff --git arch/x86/kvm/mmu/mmu.c arch/x86/kvm/mmu/mmu.c > > > > index 6c13da942bfc..7f3e0eb33b29 100644 > > > > --- arch/x86/kvm/mmu/mmu.c > > > > +++ arch/x86/kvm/mmu/mmu.c > > > > @@ -6672,7 +6672,8 @@ void kvm_mmu_invalidate_addr(struct kvm_vcpu = *vcpu, struct kvm_pagewalk *w, > > > > if (is_noncanonical_invlpg_address(addr, vcpu)) > > > > return; > > > > > > > > - kvm_x86_call(flush_tlb_gva)(vcpu, addr); > > > > + if (roots & KVM_MMU_ROOT_CURRENT) > > > > + kvm_x86_call(flush_tlb_gva)(vcpu, addr); > > > > > > Hmmm why? > > > > > > AFAICT, if the gva has a shadow mapping, then the rest of > > > kvm_mmu_invalidate_addr() will make sure the shadow mapping is > > > up-to-date and do any necessary TLB flushes in the process. So I am > > > assuming the flush here is intended to cover some cases where the gva > > > does not have a shadow mapping. Not sure how this could happen, I > > > assume we always flush the TLB when a shadow PTE is freed. > > > > > > If there are cases where we can have TLB entries but no shadow > > > mappings, then shouldn't we flush regardless of which cached roots > > > match the target PCID? I assume if none of the cached roots match the > > > PCID it's not an issue because KVM will create a new root and flush > > > the TLB before switching into the new PCID. > > > > Gah, I conflated PCIDs and VPIDs. >=20 > Disregarding the alleged over-flush, I am actually trying to figure > out why flush_tlb_gva here is needed in the INVLPG and INVPCID > emulation paths. I think understanding this will help us figure out > how to best handle it for INVLPGA. That emits an actual hardware TLB flush if there are no unsync SPTEs. Ever= ything below this point: /* Invalidate shadow pages, whether GPA->GVA or nGPA->GPA. */ if (!mmu->sync_spte) return; is specific to unsync SPTEs. __kvm_mmu_invalidate_addr() is one big nop if= there aren't any unsync SPTEs. E.g. before unsync support came along, KVM didn't intercept INVLPG: a7052897b3bc ("KVM: x86: trap invlpg"). Wwith TDP enabled, KVM definitely needs to flush guest mappings, e.g. if KV= M synthesizes a #PF (which are architecturally guaranteed to flush any releva= nt mappings), because KVM isn't controlling GVA=3D>GPA (obviously). When usin= g shadow paging, it's less obvious when KVM would need to flush hardware TLBs= even if KVM's SPTEs haven't changed since the last flush. The only things that = jumps to mind are TLB entries that were preserved across a MOV CR3 switch, e.g. g= lobal entries or MOV CR3 with X86_CR3_PCID_NOFLUSH, and the new CR3 contains a st= ale mapping (or none at all).