From: Lukas Wunner <lukas@wunner.de>
To: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
mani@kernel.org
Subject: Re: [PATCH] PCI: Allow D3 for native Hotplug capable Root Ports on DT platforms
Date: Wed, 29 Jul 2026 16:40:29 +0200 [thread overview]
Message-ID: <amoQ3SNpnLr3zb37@wunner.de> (raw)
In-Reply-To: <20260729071514.859778-1-manivannan.sadhasivam@oss.qualcomm.com>
On Wed, Jul 29, 2026 at 09:15:14AM +0200, Manivannan Sadhasivam wrote:
> Commit eb3b5bf1a88d ("PCI: Whitelist native hotplug ports for runtime D3"),
> prevented native Hotplug capable Root Ports from entering D3 citing issues
> on old Intel SkyLake Xeon-SP platform.
>
> But there is no reason to restrict D3 for native Hotplug capable Root
> Ports on DT platforms. We recently enabled D3 on non-Hotplug capable
> Root Ports on non-x86 platforms (specifically for DT platforms) in commit
> a5fb3ff63287 ("PCI: Allow PCI bridges to go to D3Hot on all non-x86"). So
> do the same for native Hotplug capable Root Ports as well.
>
> To honor the above platform_pci_bridge_d3() check, allow passing this check
> only for DT platforms, unlike a5fb3ff63287, which used !CONFIG_X86 check.
platform_pci_bridge_d3() acts as a "whitelist check": If it returns true,
the port is allowed to go to D3hot/D3cold. If it returns false, the
subsequent checks in pci_bridge_d3_possible() are free to decide the
port's fate as far as D3hot/D3cold allowance is concerned.
Thus, I don't think you need to worry about "honoring" a "false" return
value of platform_pci_bridge_d3(). (If I understand your commit message
correctly.)
> +++ b/drivers/pci/pci.c
> @@ -3020,11 +3020,11 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
> return true;
>
> /*
> - * Hotplug ports handled natively by the OS were not validated
> - * by vendors for runtime D3 at least until 2018 because there
> - * was no OS support.
> + * Do not allow D3 for native Hotplug ports on non-DT platforms
> + * as they were not validated by vendors for runtime D3 at least
> + * until 2018 because there was no OS support.
> */
> - if (bridge->is_pciehp)
> + if (bridge->is_pciehp && !of_have_populated_dt())
> return false;
And so I'm wondering whether:
+ if (IS_ENABLED(CONFIG_X86) && bridge->is_pciehp)
return false;
would be more appropriate and more consistent with the subsequent check in
pci_bridge_d3_possible() that also uses IS_ENABLED(CONFIG_X86). Basically
this would mean that we only special-case legacy x86 hardware, but assume
that anything else supports D3hot/D3cold for native hotplug bridges just
fine. In particular, arm64 systems using ACPI.
Thanks,
Lukas
next prev parent reply other threads:[~2026-07-29 14:40 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-29 7:15 Manivannan Sadhasivam
2026-07-29 14:40 ` Lukas Wunner [this message]
2026-07-29 15:12 ` Manivannan Sadhasivam
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