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From: Keith Busch <kbusch@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: santhosh kumar <santhu.linux@gmail.com>,
	linux-kernel@vger.kernel.org, Christoph Hellwig <hch@lst.de>,
	Ming Lei <ming.lei@redhat.com>,
	x86@kernel.org
Subject: Re: [RFC] PCI_IRQ_AFFINITY limits MSI-X allocation on 384 CPU / 1000+ NVMe system
Date: Thu, 30 Jul 2026 07:28:38 -0600	[thread overview]
Message-ID: <amtRhu7KdGyHIwVf@kbusch-mbp> (raw)
In-Reply-To: <87ldasfwht.ffs@fw13>

On Thu, Jul 30, 2026 at 03:16:46PM +0200, Thomas Gleixner wrote:
> As I told you before it's simple math and resource exhaustion due to the
> way how NVME is implemented and the x86 vector space limitations.
> 
> If you want that to behave differently, then you have to talk to the
> NVME people as I told you before.

We can introduce a module parameter to throttle down the maximum number
of IO queues to allocate per controller. I don't think the driver can
automatically reason out what the correct number should be because it
doesn't know how many devices it's going to see.

  reply	other threads:[~2026-07-30 13:28 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-28  6:42 santhosh kumar
2026-07-28 22:52 ` Thomas Gleixner
2026-07-29  6:29   ` santhosh kumar
2026-07-30 13:16     ` Thomas Gleixner
2026-07-30 13:28       ` Keith Busch [this message]
2026-07-30 19:44         ` Thomas Gleixner
2026-08-03 15:43           ` Keith Busch
2026-08-04 14:10             ` Christoph Hellwig
2026-08-04 14:56               ` Keith Busch
2026-08-04 21:27                 ` Thomas Gleixner
2026-08-10 21:11                   ` Keith Busch

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