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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Umesh Kumar <ukumar@marvell.com>
Cc: Andi Shyti <andi.shyti@kernel.org>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	bbhushan2@marvell.com, linux-i2c@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] i2c: designware: Enable SAR in slave mode for Multiple SAR controllers
Date: Thu, 13 Aug 2026 09:37:47 +0300	[thread overview]
Message-ID: <an1mOxBoqTc_8DE0@ashevche-desk.local> (raw)
In-Reply-To: <20260812114514.3817964-1-ukumar@marvell.com>

On Wed, Aug 12, 2026 at 05:15:14PM +0530, Umesh Kumar wrote:
> DesignWare controllers synthesised with the Multiple SAR feature (e.g.
> Marvell CN20K) gate the primary slave address behind IC_ENABLE.SAR_EN
> (bit 19). Per the Synopsys DW_apb_i2c DataBook (Multiple SAR feature),

Also provide a version of the DataBook. Something like v2.20c (hypothetical
example).

> when this bit is set the core acknowledges the address matching IC_SAR;
> otherwise the address is NACKed. The slave enable path writes only
> IC_ENABLE.ENABLE (bit 0), so on such controllers the target never ACKs
> its address and a remote master cannot reach it.
> 
> Set SAR_EN together with ENABLE when entering slave mode. The bit is
> reserved (and ignored) on single-SAR controllers, so existing users are
> unaffected.
> 
> Signed-off-by: Umesh Kumar <ukumar@marvell.com>
> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> ---

This is a v3 and no changelog here... What's going on?

Assuming this will be provided
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

...

> +		/*
> +		 * Per the Synopsys DW_apb_i2c DataBook (Multiple SAR feature),

Ditto (mind the version).

> +		 * controllers synthesised with multiple SARs only acknowledge
> +		 * traffic to IC_SAR when IC_ENABLE.SAR_EN is set; a plain enable
> +		 * is not enough. The bit is reserved (ignored) on single-SAR
> +		 * controllers.
> +		 */

...

> +/*
> + * IC_ENABLE.SAR_EN, per the Synopsys DW_apb_i2c DataBook (Multiple SAR
> + * feature): on controllers synthesised with multiple SARs (e.g. Marvell
> + * CN20K) the primary slave address (IC_SAR) is only acknowledged when this
> + * bit is set. Must be programmed while IC_ENABLE.ENABLE is 0. Reserved on
> + * single-SAR controllers.
> + */

Not sure if we need a dup comment as it's also in the code. Perhaps leave only
in the C code where it makes more sense?

> +#define DW_IC_ENABLE_SAR_EN			BIT(19)

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2026-08-13  6:37 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-04  4:18 [RFC PATCH] " Umesh Kumar
2026-08-04 10:36 ` Mika Westerberg
2026-08-12  3:40 ` [PATCH v2] " Umesh Kumar
2026-08-12  7:16   ` Andy Shevchenko
2026-08-12 10:37     ` [EXTERNAL] " Umesh Kumar
2026-08-12 11:45 ` [PATCH v3] " Umesh Kumar
2026-08-13  6:37   ` Andy Shevchenko [this message]
2026-08-17  8:40 ` [PATCH v4] " Umesh Kumar
2026-08-17 11:10   ` Andy Shevchenko
2026-08-17 16:21 ` [PATCH v5] " Umesh Kumar
2026-08-17 16:33   ` Andy Shevchenko
2026-08-18 14:18     ` [EXTERNAL] " Umesh Kumar
2026-08-18 14:43 ` [PATCH v6] " Umesh Kumar

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