From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A465041D21D for ; Mon, 3 Aug 2026 14:44:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785768269; cv=none; b=pZC56HaiB2zysZjZDfklmFi7qNSlcToe3FgVs+qCV+xQztjpmecQ5pIS6ZhosJX3vHR1Pb1IwvHBExHg1YB1HEPg4ELIP3/BR/1YaKDp1Oot9PdhJ/5TSB8evk9FxQt+tJzNGmmqZcNJPLwDeYuNPY3unk24eMoep9Y922Nud7s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785768269; c=relaxed/simple; bh=TPNhfpCjJ7K9BIQKoO6eafvRbdeq9bSuqGX5iRJjLwg=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=FYHJTgdxByRxxN1xIgWhpfs4+hhcrwU9Et/0AF/L6vrvHAibayrvgVS0vG7tCQ8UgHCoF2TJGsOC0jIfbGff2N7dEHTHH3szRzgDGepFTeLrc8jOUChMgAiYeYGH0jPFhuRZ9akjlWV8FDJJBzVNOTWxJg2N+DcFuIwv69kELeQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=M7HRWy1g; dkim=pass (2048-bit key) header.d=redhat.com header.i=@redhat.com header.b=h4uob3ud; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="M7HRWy1g"; dkim=pass (2048-bit key) header.d=redhat.com header.i=@redhat.com header.b="h4uob3ud" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1785768266; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=ptAA2UgbXk0GHtmmP9E3bbEDZbmeRKtWgtxlW5QXXyQ=; b=M7HRWy1gytdE8yxSJQE7px0j4MCEx80QJ9qL17rscPrC29MrBJ5zXg9vTQSIerI+BSaG8n EtVlqsTCfbKBLPmg/O/4ePAmhIuSA53uc/1V17S2HyhzyJ9UfXyK0GFQ+RsEzexJawW0j6 ewKdFj1EMa05u6gn4JssFieRYaFmSD4= Received: from mail-yx1-f70.google.com (mail-yx1-f70.google.com [74.125.224.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-345--2VFb9HeO-KQPmsTbjpvdA-1; Mon, 03 Aug 2026 10:44:19 -0400 X-MC-Unique: -2VFb9HeO-KQPmsTbjpvdA-1 X-Mimecast-MFC-AGG-ID: -2VFb9HeO-KQPmsTbjpvdA_1785768259 Received: by mail-yx1-f70.google.com with SMTP id 956f58d0204a3-668910ff32bso8904444d50.1 for ; Mon, 03 Aug 2026 07:44:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=google; t=1785768259; x=1786373059; darn=vger.kernel.org; h=user-agent:in-reply-to:content-disposition:content-type :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to:content-type; bh=ptAA2UgbXk0GHtmmP9E3bbEDZbmeRKtWgtxlW5QXXyQ=; b=h4uob3udm9e2cIOawsFZOSgPzktjbGatUirDt107Qlh0flnOB5zgtGlr/ZVdDhUhWg NgrFUeH9zrxUAnT0tqHy2tq5t4/ki/IKJq0kHt/apqZHnoI3S7bm70H26mZHy/z07ZlR HHi7YPEXEsg/ndNm6F+BwYNefyiiMb+3fosPh9xl+xYA5kbic6sBjXsy9wVsygo9/QRW c0E/F9+p6ivmcRAsh/H/rmwT37UKWjCOfcpo8KxFRcBNnjoJKVZci+2Sjnt3irJq1JfZ bBJsVMCRCirR+2xq1+60FLOSXY4A9jxtOltTjEilR+sbvzLPPF7WmzFfTW/OqXEPYpbK cazg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1785768259; x=1786373059; h=user-agent:in-reply-to:content-disposition:content-type :mime-version:references:message-id:subject:cc:to:from:date:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=ptAA2UgbXk0GHtmmP9E3bbEDZbmeRKtWgtxlW5QXXyQ=; b=qujxFiFy8pHce1beTkSUoBWslY7j+AA4wTj+Onyaz2auHS8HG+Uhu39oFnd2z1Tl+6 ulkWQ+x2j+R3617ahI02hQZPUpvjULhxV2Hg4BGi6t+bWm2XyPd3G/OF3nYfrumOkk06 pqC/Mpco4d8j5kCbOBOfev7g7GZ1tjHWIymUOgS2YC0hF/2R1mamzKnu53WFz0tAAlHd 6RBvCoLlGcU2XyJaemDAC2fNQLmbtlx+aW2hg16Ig3/Iy4iyFGTdRlg90Z7crxNiVVbi WaacsGu8fYx9WchtFXNVffbZNRIiPQxk3Xft2ze0c85g36+jY5hBfYTJWlvnjxW3sem4 uWjg== X-Forwarded-Encrypted: i=1; AHgh+RoTxgEpQcLZYUuEPwTt/fMVZ0VGWepm9TStOW4AjSmnz/xrrIzAhRBrN9MmvMmvXdM35SRqYSGTK3ryGp0=@vger.kernel.org X-Gm-Message-State: AOJu0YzygwMoa+Bx3NHMTiHqjyLmaCNeispcYrYPKJKWT6X7y1tgCgB5 CCvqHDqhnsk7hFeJhq0naAJmBT29uHhbJE8XGrrCEa92ByJ0kOEf5fAoOX2wPAOcn8F6PFJqj7y K6o9jHJUFNLS+Yc73vawQaQSTXBm7+K8M/pMk8qTpSLoxKVf2TFvucx1ihHdCwoLwgw== X-Gm-Gg: AR+sD11ok/8HkXQmdToOELJ4bAH60erlA1pvfmu6q8QrzwADXjJrJ1xCPplKNEkUzDL pO+YiMYI2w3r7f+JI8j/q3ALKMHte3ghU1QUx+ozMLdf56Q22oA3PR+f5ej5PHDBXNfvcfruI6N OARV/AgMIDQt9sfEquZxf99/piSiMLkIUvIcHHTcYo8cXF1eamAxp8aojjEvbW/GojzeFgFj8kS tC72fIA58ncaPjSBw1cHjXmmBbW9Q4ZzRXFn9kOZAr91pqtBqmUejkh69+jyyMSuM/Dt938O84N YJg436jQyNNns6DNS6WEGxj/c7rnz/dtzDvkj3VE60Q/dpg3o9cJ21pjPWXazM5ik6ynW8YJaP7 ftLCRnsQeUg1KtSAfnaiKOHtEMR+zXig+trs= X-Received: by 2002:a53:ef09:0:b0:664:e66e:f955 with SMTP id 956f58d0204a3-6694efcd46cmr9652587d50.4.1785768258652; Mon, 03 Aug 2026 07:44:18 -0700 (PDT) X-Received: by 2002:a53:ef09:0:b0:664:e66e:f955 with SMTP id 956f58d0204a3-6694efcd46cmr9652545d50.4.1785768258248; Mon, 03 Aug 2026 07:44:18 -0700 (PDT) Received: from redhat.com (c-73-183-53-213.hsd1.pa.comcast.net. [73.183.53.213]) by smtp.gmail.com with ESMTPSA id 956f58d0204a3-66948fcb3acsm5643561d50.10.2026.08.03.07.44.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2026 07:44:17 -0700 (PDT) Date: Mon, 3 Aug 2026 10:44:15 -0400 From: Brian Masney To: Louis-Alexis Eyraud Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Jie Chen , Philipp Zabel , Edward-JW Yang , Richard Cochran , Chen-Yu Tsai , kernel@collabora.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org Subject: Re: [PATCH v5 13/25] clk: mediatek: pll: Add ops for PLLs using set/clr regs Message-ID: References: <20260801-mt8189-clocks-system-base-v5-0-ac4410697cc2@collabora.com> <20260801-mt8189-clocks-system-base-v5-13-ac4410697cc2@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260801-mt8189-clocks-system-base-v5-13-ac4410697cc2@collabora.com> User-Agent: Mutt/2.4.0 (2026-06-19) Hi Louis-Alexis, On Sat, Aug 01, 2026 at 01:20:59PM +0200, Louis-Alexis Eyraud wrote: > MT8189 SoC uses a new combination of status and set/clr registers to > control its PLL enable state and perform BAR reset, that are different > than the current default clock prepare/unprepare operations are using. > > Add new set of PLL clock operations to support this logic that relies > on the following registers for prepare/unprepare operations: > - en/en_set/en_clr, rather than en register, for PLL enable > control > - rst_bar/rst_bar_set/rst_bar_clr, rather than default rst_bar > register for BAR reset control > > Also, handle rst_bar register setting/clearing with a timeout, to > verify the operation was correctly performed. > > Signed-off-by: Louis-Alexis Eyraud > --- > drivers/clk/mediatek/clk-pll.c | 66 ++++++++++++++++++++++++++++++++++++++++++ > drivers/clk/mediatek/clk-pll.h | 5 ++++ > 2 files changed, 71 insertions(+) > > diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c > index 9a197a657dce..3118f68aa9ac 100644 > --- a/drivers/clk/mediatek/clk-pll.c > +++ b/drivers/clk/mediatek/clk-pll.c > @@ -9,6 +9,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -32,6 +33,7 @@ > #define INTEGER_BITS 7 > > #define PLL_STABILIZATION_DELAY 20 /* in us */ > +#define RST_BAR_TIMEOUT 20 /* in us */ > > int mtk_pll_is_prepared(struct clk_hw *hw) > { > @@ -301,6 +303,60 @@ void mtk_pll_unprepare(struct clk_hw *hw) > mtk_pll_power_off(pll); > } > > +int mtk_pll_prepare_setclr(struct clk_hw *hw) > +{ > + struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); > + u32 val = 0; > + int ret; > + > + mtk_pll_power_on(pll); > + > + writel(BIT(pll->data->pll_en_bit), pll->en_set_addr); > + > + __mtk_pll_tuner_enable(pll); > + > + udelay(PLL_STABILIZATION_DELAY); > + > + if (pll->data->flags & HAVE_RST_BAR) { > + writel(pll->data->rst_bar_mask, pll->rst_bar_set_addr); > + > + ret = readl_poll_timeout(pll->rst_bar_addr, val, > + (val & pll->data->rst_bar_mask), 1, > + RST_BAR_TIMEOUT); > + if (ret) { > + mtk_pll_unprepare_setclr(hw); > + return ret; > + } > + } > + > + return 0; > +} > +EXPORT_SYMBOL_GPL(mtk_pll_prepare_setclr); > + > +void mtk_pll_unprepare_setclr(struct clk_hw *hw) > +{ > + struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); > + u32 val = 0; > + > + if (pll->data->flags & HAVE_RST_BAR) { > + writel(pll->data->rst_bar_mask, pll->rst_bar_clr_addr); > + > + /* ignore return code to continue unpreparing the PLL if > + * a error occurs on register read poll. Use proper kernel comment: /* * Ignore return code... */ Also s/a error/an error/ With that fixed: Reviewed-by: Brian Masney