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Tue, 4 Aug 2026 21:13:14 +0000 Date: Tue, 4 Aug 2026 14:13:12 -0700 From: "Luck, Tony" To: Chen Yu CC: Reinette Chatre , Ben Horgan , James Morse , Dave Martin , Babu Moger , Fenghua Yu , Borislav Petkov , Thomas Gleixner , Dave Hansen , Peter Newman , , , Subject: Re: [RFC PATCH 25/31] x86/resctrl: Introduce region-based MBA write implementation on MMIO space Message-ID: References: <003c5ab0a49d3bd5d0dec0af50632073c378b6e8.1785680802.git.yu.c.chen@intel.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <003c5ab0a49d3bd5d0dec0af50632073c378b6e8.1785680802.git.yu.c.chen@intel.com> X-ClientProxiedBy: SJ0PR03CA0091.namprd03.prod.outlook.com (2603:10b6:a03:333::6) To SJ1PR11MB6083.namprd11.prod.outlook.com (2603:10b6:a03:48a::9) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PR11MB6083:EE_|DSWPR11MB9692:EE_ X-MS-Office365-Filtering-Correlation-Id: e7fc75be-ef19-4602-db66-08def26d322e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|376014|7416014|1800799024|366016|10067099003|5023799004|11063799006|56012099006|22082099003|18002099003|4143699003; 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The callback therefore does a > read-modify-write: it changes only its own region's field and writes > every other bit back exactly as it was read, so the reserved bits keep > their original values. A shadow copy of the register (marc_buf) holds > the value last written, which spares the read on later updates. > > Signed-off-by: Chen Yu > --- > arch/x86/kernel/cpu/resctrl/erdt.c | 52 ++++++++++++++++++++++++++ > arch/x86/kernel/cpu/resctrl/internal.h | 4 ++ > 2 files changed, 56 insertions(+) > > diff --git a/arch/x86/kernel/cpu/resctrl/erdt.c b/arch/x86/kernel/cpu/resctrl/erdt.c > index 38720c3b4a3d..c25aff805b12 100644 > --- a/arch/x86/kernel/cpu/resctrl/erdt.c > +++ b/arch/x86/kernel/cpu/resctrl/erdt.c > @@ -275,6 +275,49 @@ struct erdt_domain_info *erdt_find_domain_info(int cpu) > > static void marc_hw_update(struct hw_param *m) > { > + struct rdt_hw_ctrl_domain *hw_dom = resctrl_to_arch_ctrl_dom(m->dom); > + struct resctrl_hw_ctrl *hw_ctrl = resctrl_to_arch_ctrl(m->ctrl); > + enum resctrl_ctrl_name name = hw_ctrl->r_ctrl.name; > + unsigned int offset, region, type, region_offset_bits; > + struct erdt_domain_info *d = hw_dom->d_info; > + enum erdt_mmio_type mmio_type; > + void __iomem *addr; > + int closid_idx; > + unsigned int i; > + u64 val; > + > + if (!d || !d->marc) > + return; > + > + offset = name - RESCTRL_CTRL_NAME_REGION0_OPT; > + region = offset / RESCTRL_CTRL_REGION_NR_CTRLS; > + type = offset % RESCTRL_CTRL_REGION_NR_CTRLS; > + mmio_type = ERDT_MMIO_MARC_OPT + type; > + region_offset_bits = (region % 4) * 16; > + > + if (d->marc_buf_type != mmio_type) { > + memset(d->marc_buf, 0, > + d->marc->mba_reg_size * 512 * sizeof(u64)); > + d->marc_buf_type = mmio_type; > + } > + > + for (i = m->low; i < m->high; i++) { > + closid_idx = (region / 4) * 64 + i; > + addr = d->base[mmio_type] + closid_idx * 8; > + > + /* The cached value retains the reserved bits to be preserved. */ > + val = d->marc_buf[closid_idx]; > + if (!val) > + val = readq(addr); > + > + if (WARN_ON_ONCE(!val)) > + return; > + > + val &= ~(0x1ffULL << region_offset_bits); > + val |= (u64)(hw_dom->ctrl_val[i] & 0x1ff) << region_offset_bits; > + d->marc_buf[closid_idx] = val; > + writeq(val, addr); > + } > } There are lots of opinions about bit fields. I'm a fan for h/w registers accessed in architecture specific code. I think the version below is easier to read than all the inline masks and shifts. -Tony union bw_ctrl { u64 reg; struct { u16 val : 9; u16 rsvd : 7; } regions[4]; }; static void marc_hw_update(struct hw_param *m) { struct rdt_hw_ctrl_domain *hw_dom = resctrl_to_arch_ctrl_dom(m->dom); struct resctrl_hw_ctrl *hw_ctrl = resctrl_to_arch_ctrl(m->ctrl); enum resctrl_ctrl_name name = hw_ctrl->r_ctrl.name; struct erdt_domain_info *d = hw_dom->d_info; unsigned int offset, region, type; enum erdt_mmio_type mmio_type; union bw_ctrl mmio_ctrl; void __iomem *addr; int closid_idx; unsigned int i; if (!d || !d->marc) return; offset = name - RESCTRL_CTRL_NAME_REGION0_OPT; region = offset / RESCTRL_CTRL_REGION_NR_CTRLS; type = offset % RESCTRL_CTRL_REGION_NR_CTRLS; mmio_type = ERDT_MMIO_MARC_OPT + type; if (d->marc_buf_type != mmio_type) { memset(d->marc_buf, 0, d->marc->mba_reg_size * 512 * sizeof(u64)); d->marc_buf_type = mmio_type; } for (i = m->low; i < m->high; i++) { closid_idx = (region / 4) * 64 + i; addr = d->base[mmio_type] + closid_idx * 8; /* The cached value retains the reserved bits to be preserved. */ mmio_ctrl.reg = d->marc_buf[closid_idx]; if (!mmio_ctrl.reg) mmio_ctrl.reg = readq(addr); if (WARN_ON_ONCE(!mmio_ctrl.reg)) return; mmio_ctrl.regions[region].val = hw_dom->ctrl_val[i]; d->marc_buf[closid_idx] = mmio_ctrl.reg; writeq(mmio_ctrl.reg, addr); } }