From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 58BCB431A4C for ; Tue, 11 Aug 2026 17:08:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786468121; cv=none; b=X33XI4OLAwTZfh/JLcIPuWjXRPoHDciTM52a+f300ZlkM1T2oOKOmyQmd1j/ab3EUUlp/uQDMnT1DQAr2iVDRYHM+DlBI7MjlTfPTJ+V8e1KLaS6qUOpBkkJhdAQmVB6tMeV5KzTjWE+x+0oaHL+4Z0ZpKlsXpFx67eJjRnRL1A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786468121; c=relaxed/simple; bh=l1B9kwgyagD4GTWYA9xgnxv0nriU8NaPIVqR0Qd5zmg=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=aA23EPoORXhWkAGAMPC6xAzRohkjjD+DRS2Lw22b/9kkSm2ioGB/7dYn1J6G7hGs7uBhBZgd0ipLUW8NQPNlQ8SzL4lQsV+3josnPmn7XskFQ7pWAQI73wJom7VCi5+H/uXOJANJfPGUkVt15YwcV21psvcQbrDg0IxPKzUzq1A= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=APAiW2Zl; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="APAiW2Zl" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 98BF91516; Tue, 11 Aug 2026 10:08:35 -0700 (PDT) Received: from e129823.arm.com (e129823.arm.com [10.2.213.3]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 01B263F632; Tue, 11 Aug 2026 10:08:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1786468119; bh=l1B9kwgyagD4GTWYA9xgnxv0nriU8NaPIVqR0Qd5zmg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=APAiW2Zlva9nQ4ZC+uRn2ZfzKnWWX0iCF8tncuonwqcDnIyyivoLkZHLVpNsyPbeI MnWddE2aIZrpKXOMDzPCBLGSKTChYL1mOBUhDJqsO1v9TZP0On8QqEi8f0Ym/tDxdJ SxbiiWnpra/o+iazXauyss32FCHPXfdN5hfKmA1g= Date: Tue, 11 Aug 2026 18:08:35 +0100 From: Yeoreum Yun To: Leo Yan Cc: Yeoreum Yun , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, suzuki.poulose@arm.com, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, jie.gan@oss.qualcomm.com Subject: Re: [PATCH v9 10/13] coresight: etm4x: exclude ss_status from drvdata->config Message-ID: References: <20260725113645.57519-1-yeoreum.yun@arm.com> <20260725113645.57519-11-yeoreum.yun@arm.com> <20260811170242.GH15499@e132581.arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260811170242.GH15499@e132581.arm.com> On Tue, Aug 11, 2026 at 06:02:42PM +0100, Leo Yan wrote: > On Sat, Jul 25, 2026 at 12:36:42PM +0100, Yeoreum Yun wrote: > > The purpose of TRCSSCSRn register is to show status of > > the corresponding Single-shot Comparator Control and input supports. > > I vaguely remember that we discussed the issue with always clearing > drvdata::ss_status in hw_enable(), which might result in single-shot > does not work properly in a perf session. > > This issue is not introduced by this patch, and I think we agreed to > address it later. Could you document it in the commit log so that we > can understand and track the issue later. Okay. I'll add this in commit message. > > > That means writable field's purpose for reset or restore from idle status > > not for configuration. > > > > Therefore, exclude ss_status from drvdata->config and move it to drvdata. > > > > Signed-off-by: Yeoreum Yun > > With above amending: > > Reviewed-by: Leo Yan Thanks! -- Sincerely, Yeoreum Yun