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From: Karl Mehltretter <kmehltretter@gmail.com>
To: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	 Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] ARM: asid: Do not replace active_asids if already 0
Date: Thu, 27 Aug 2026 05:56:21 +0200	[thread overview]
Message-ID: <ao-1AUkmBM0lVT97@gmail.com> (raw)
In-Reply-To: <20260809180600.6049-1-kmehltretter@gmail.com>

On Sun, Aug 09, 2026 at 08:06:00PM +0100, Karl Mehltretter wrote:
> This patch changes the xchg to cmpxchg so that the active_asids is only
> updated if non-zero to avoid a race with an ASID roll-over on a
> different CPU.
> 
> Cc: Russell King <linux@armlinux.org.uk>
> Cc: Will Deacon <will@kernel.org>
> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> Tested-by: Karl Mehltretter <kmehltretter@gmail.com>
> Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com>
> ---
> This is similar to the arm64 patch [1], with the difference that
> non-relaxed (cmp)xchg is used as in the existing ARM code.
> 
> This is a resubmission of Catalin Marinas' original 2018 patch. The
> original submission was not merged, and the ARM32 equivalent of the arm64
> ASID rollover fix remains missing.
> 

Just a friendly ping in case this got missed.

Thanks,
Karl

  reply	other threads:[~2026-08-27  3:56 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-09 18:06 Karl Mehltretter
2026-08-27  3:56 ` Karl Mehltretter [this message]
2026-08-27 10:26 ` Catalin Marinas
2026-08-29 17:49   ` Karl Mehltretter

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