From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mta0.migadu.com (out-229.mta0.migadu.com [91.218.175.229]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A56143E079 for ; Mon, 17 Aug 2026 16:03:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.229 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786982616; cv=none; b=pLY9A3Nuno6BkGJMh0U2GQaeUvHfNwF3WhYu6x6qmH/2bIeKoNIBTyCzE437kbX3hoWrvW0+C1f2v77wAtYUShLcbE0uq1vp8Xhtf0glu7IYC9adQG0MvqcFIWd6xBeYK/SmrE9pWw4jz3XPqIKKfVBPPoEw4+HjeBVdd2eP4bs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786982616; c=relaxed/simple; bh=E/aYyG4q/wWNvmUC5ieZWMSODBbqcsSyCCfPCx/L+/U=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=i+7kXzZ0nEINs0MTKqwJ/op1CcPTnYXIQkCZC+I2mCu/Vp9eQ5tcEnSHkHPaS+qPR8h5NXxb9cg9Q5o+vOrS+cNADHK1EPrJxgY9/jan1+1ZjaawxO7x3N4mY0sW1Ge4thJJUu+2YmdBgGRDlnvUscyU99iLUFGn0q/ZGzvJTy8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=kdiAgEh5; arc=none smtp.client-ip=91.218.175.229 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="kdiAgEh5" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=E/aYyG4q/wWNvmUC5ieZWMSODBbqcsSyCCfPCx/L+/U=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786982606; v=1; x=1787587406; b=kdiAgEh5Qwqs1pOpWZsCd0q7KWbO6/Y+EORA+luVZDLQbUlluYfugGl1Os6bwiZNrgZyGAY4 Ph7CPX+KF3jZMyKx6oEWdZj5ms6CT/VFd6nnJ57TtlFHNHw/FEOT6BKZaemzWSLIlTso5EUjbUb LB8wmcFEyCS+ZRbBWqsAQ9UE= X-Envelope-To: linux-kernel@vger.kernel.org Received: from three-body (240e:398:91:25b0:222e:1871:d2c:ce54) by smtp.migadu.com with ESMTPS id 504d82a4d9ae464b; Mon, 17 Aug 2026 16:03:26 +0000 X-Migadu-Flow: FLOW_OUT Date: Wed, 19 Aug 2026 00:02:57 +0800 From: Chen Yu To: Reinette Chatre Cc: Tony Luck , Borislav Petkov , Thomas Gleixner , Dave Hansen , Peter Newman , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , Dave Martin , Ben Horgan , James Morse , Babu Moger , Drew Fustini , Fenghua Yu , Chen Yu Subject: Re: [RFC v2] arm,x86,fs/resctrl: Generic schema description Proof of Concept Message-ID: References: <9e38f138-7872-445d-9a11-105f9d0fa4d0@intel.com> <07a79f5f-ad39-447d-b43d-01e44c7870a2@intel.com> <5ecbbe3d-aa8c-409b-8963-0ee50b456814@intel.com> <5e07c57d-b971-4c7a-bdfe-3b9c6f299b8b@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5e07c57d-b971-4c7a-bdfe-3b9c6f299b8b@intel.com> On Thu, Aug 13, 2026 at 08:19:38AM -0700, Reinette Chatre wrote: > On 8/13/26 6:59 AM, Chen Yu wrote: > > diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c > > index cac4b3293cef..ab7d3fa3f337 100644 > > --- a/fs/resctrl/rdtgroup.c > > +++ b/fs/resctrl/rdtgroup.c > > @@ -124,7 +124,7 @@ void rdt_staged_configs_clear(void) > > if (list_empty(&ctrl->emulated_by)) > > continue; > > list_for_each_entry(em_ctrl, &ctrl->emulated_by, entry) { > > - list_for_each_entry_rcu(dom, &ctrl->domains, hdr.list, lockdep_is_cpus_held()) > > + list_for_each_entry_rcu(dom, &em_ctrl->domains, hdr.list, lockdep_is_cpus_held()) > > memset(dom->staged_config, 0, sizeof(dom->staged_config)); > > } > > } > Thank you very much. Squashed and available in branch resctrl/controls_rfc_v2.2 > :) Another minor one otherwise a schemata write on Haswell would only update rdt_hw_ctrl_domain::ctrl_val[] and never reach MSR_IA32_L3_CBM_BASE. --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -175,6 +175,10 @@ static inline void cache_alloc_hsw_probe(void) hw_ctrl->r_ctrl.bitmap.cbm_len = 20; hw_ctrl->r_ctrl.bitmap.shareable_bits = 0xc0000; hw_ctrl->r_ctrl.bitmap.min_cbm_bits = 2; + + hw_ctrl->msr_base = MSR_IA32_L3_CBM_BASE; + hw_ctrl->hw_update = cat_wrmsr; + list_add(&hw_ctrl->r_ctrl.entry, &r->controls); hw_res->num_closid = 4; thanks, Chenyu