From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DEB3637BE80 for ; Mon, 24 Aug 2026 17:46:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787593612; cv=none; b=eh83YuWBnANpzxfvesAkaMENdN/dQlwyGguXcZxVtjo4+Ywhw1xS87cfmbOiqpTZR7g+y4kQtXG0KbxCK3M6EJwD3WCRAN1ivyxKHXpQw2WQ3h2GJfuPgh66xL/F12CL04vvRzUF55U/4r+F+SzeDtF2M8kMbbPHoj5/Yqb0XW8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787593612; c=relaxed/simple; bh=QTYuOVk8IIe9t1fIX8d1LCvBt7nyRWp/jzAp6BSchhY=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=koM37n/99lAcREX/iorw3Qwat+GEYXphfVwwT0XB75ihwsXfC2XvlshL9CQvw9xwiwfY82VOQz01GnowQ28szKWPG/tUwXEl3Dwg8WztI/GGqIGczey5mHiqXEzDj/RwyYuJL4YPe7Wr/w+PC3kgXnoqijDMhxr7jRp1XZsKeY4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RvSy0iDr; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RvSy0iDr" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C24FE1F000E9; Mon, 24 Aug 2026 17:46:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1787593610; bh=XL5dNrPxzCFza2YcGXmCK2PQI9trUsLqmLvWN51sOe0=; h=Date:From:To:Cc:Subject; b=RvSy0iDrJFlC0jX7RNl6sOkTvVJZt+S5F9H+bPmcq3Xb+lmjMKIn8GwbbXiznRjvS uZrj/HCYCR2FtmWCTwmNjTNokuA6iK3A9YiDwxAEADNjCRMLfXRexZ4ANAuTK/nXf2 JmIBu/roWbXe2jpr1LB7TfVuV+9ZWvUX8CXepNr7T44LYKXTi05MpIAQiwOayf0r99 m8Sad/M1mjYNO60qo340I5l04TUGl5yX5caYAI/6xk7U3zUKBet1tohALV+JeUjO7i cMcSLt6xhD1YnlbaIX+xQSV7ZRjnHHuv41plQrGY53xZzCcF7hSFfOzOU/5GzO0+FZ xaAxc9NlmxxMA== Date: Mon, 24 Aug 2026 23:16:47 +0530 From: Vinod Koul To: Linus Torvalds Cc: LKML Subject: [GIT PULL]: dmaengine updates for v7.3 Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="Aojo7tv4FSuvICl7" Content-Disposition: inline --Aojo7tv4FSuvICl7 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Linus, Please pull to receive dmaengine updates which consist of a new core api, a new Mediatek device support and updates led by dw-dma driver and few others. The following changes since commit dc59e4fea9d83f03bad6bddf3fa2e52491777482: Linux 7.2-rc1 (2026-06-28 12:01:31 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git tags/dm= aengine-7.3-rc1 for you to fetch changes up to 0d995da5fb97e8c312834575604d4423eb6225b7: dmaengine: dw-edma: Mark emulated IRQ as level-triggered (2026-08-12 00:1= 6:54 +0530) ---------------------------------------------------------------- dmaengine updates for v7.3 Core: - New API to combine configuration and preparation and users New Support: - Mediatek MT8189 SoC uart dma support Updates: - Designware dma driver flatten desc structures and simplify code, interrupt-path groundwork changes, first part of PCI EP DMA support - Updates to zynqmp_dma with runtime PM and device removal improvments - Xilinx dma optimizations for AXIDMA and MCDMA channel management ---------------------------------------------------------------- Adrian Ng Ho Yin (1): MAINTAINERS: replace maintainer for Altera mSGDMA driver Alex Bereza (2): dmaengine: xilinx_dma: Fix CPU stall in xilinx_dma_poll_timeout dmaengine: xilinx_dma: Rename XILINX_DMA_LOOP_COUNT Ben Dooks (1): dmaengine: dw-axi-dmac: fix __le32 on set of CH_CTL_H_LLI_VALID Christophe JAILLET (1): dmaengine: Constify struct dma_descriptor_metadata_ops Devendra K Verma (1): dmaengine: dw-edma: Enable HDMA 64R/W Channels Frank Li (19): dmaengine: Add API to combine configuration and preparation (sg and s= ingle) dmaengine: Add safe API to combine configuration and preparation PCI: endpoint: pci-epf-test: Use dmaengine_prep_config_single() to si= mplify code dmaengine: dw-edma: Use new .device_prep_config_sg() callback dmaengine: dw-edma: Pass dma_slave_config to dw_edma_device_transfer() nvmet: pci-epf: Remove unnecessary dmaengine_terminate_sync() on each= DMA transfer nvmet: pci-epf: Use dmaengine_prep_config_single_safe() API PCI: epf-mhi: Use dmaengine_prep_config_single() to simplify code crypto: atmel: Use dmaengine_prep_config_sg() API dmaengine: dw-edma: Move control field update of DMA link to the last= step dmaengine: dw-edma: Add xfer_sz field to struct dw_edma_chunk dmaengine: dw-edma: Move ll_region from struct dw_edma_chunk to struc= t dw_edma_chan dmaengine: dw-edma: Pass down dw_edma_chan to reduce one level of ind= irection dmaengine: dw-edma: Add helper dw_(edma|hdma)_v0_core_ch_enable() dmaengine: dw-edma: Add callbacks to fill link list entries dmaengine: dw-edma: Add non_ll_start() callback dmaengine: dw-edma: Use common dw_edma_core_start() for both eDMA and= HDMA dmaengine: dw-edma: Use burst array instead of linked list dmaengine: dw-edma: Remove struct dw_edma_chunk Giovanni Cabiddu (1): dmaengine: idxd: assign all engines to group 0 in IAA defaults Golla Nagendra (2): dmaengine: zynqmp_dma: fix race between runtime PM and device removal dmaengine: zynqmp_dma: fix kernel doc for zynqmp_dma_remove() Griffin Kroah-Hartman (1): dmaengine: fsl-edma: Add error handling for devm_kasprintf Guangshuo Li (1): dmaengine: qcom-bam-dma: fix autosuspend cleanup during removal Jun Guo (1): dmaengine: arm-dma350: enable ANYCH interrupt for shared IRQ wiring Koichiro Den (24): dmaengine: dw-edma: Fix HDMA channel status register access dmaengine: dw-edma: Terminate all descriptors without callbacks dmaengine: dw-edma: Serialize abort state updates dmaengine: dw-edma: Complete descriptors before pausing dmaengine: dw-edma: Serialize channel state checks dmaengine: dw-edma: Clear stale requests on termination dmaengine: dw-edma-pcie: Drop redundant pci_free_irq_vectors() dmaengine: dw-edma: Snapshot the v0 interrupt status once per handler= pass dmaengine: dw-edma: Defer channel IRQ handling to workqueue dmaengine: dw-edma: Factor out HDMA interrupt setup helper dmaengine: dw-edma: Add per-channel interrupt routing control dmaengine: dw-edma: Add core quiesce operations dmaengine: dw-edma: Initialize IRQ data before requesting IRQs dmaengine: dw-edma: Add partial channel ownership mode dmaengine: dw-edma-pcie: Track non-LL mode in DMA data dmaengine: dw-edma-pcie: Add capability match data dmaengine: dw-edma-pcie: Rename vsec_data to dma_data dmaengine: dw-edma-pcie: Add platform ops to match data dmaengine: dw-edma-pcie: Add register offset match flag dmaengine: dw-edma-pcie: Factor out descriptor block address lookup dmaengine: dw-edma-pcie: Handle optional data blocks dmaengine: dw-edma-pcie: Add chip flags to match data dmaengine: dw-edma: Program endpoint function numbers dmaengine: dw-edma: Mark emulated IRQ as level-triggered Kuldeep Singh (1): dt-bindings: dma: qcom,bam-dma: Increase iommus maxItems to 7 Louis-Alexis Eyraud (1): dt-bindings: dma: mediatek,uart-dma: add support for MT8189 SoC Martin Kaiser (1): dmaengine: fsl-edma: tracing: no ptr dereference during log output Pengpeng Hou (1): dmaengine: pl330: remove debugfs file on teardown Rob Herring (Arm) (1): dt-bindings: dma: xilinx: Fix "xlnx,irq-delay" type Rosen Penev (5): dmaengine: tegra210-adma: use platform to ioremap dma: fsl_raid: convert descriptor stores to big-endian dma: fsl_raid: set final bit via fill_cfd_frame() argument dma: fsl_raid: keep MMIO bases as void __iomem and cast at access dma: fsl_raid: use devm_platform_ioremap_resource Sang-Heon Jeon (1): dmaengine: qcom_hidma: remove conditional return with no effect Suraj Gupta (4): dt-bindings: dma: xlnx,axi-dma: Restore xlnx,flush-fsync as u32 dmaengine: xilinx_dma: Fix channel idle state management in AXIDMA an= d MCDMA interrupt handlers dmaengine: xilinx_dma: Enable transfer chaining for AXIDMA and MCDMA = by removing idle restriction dmaengine: xilinx_dma: Optimize control register write and channel st= art logic for AXIDMA and MCDMA in corresponding start_transfer() Vinod Koul (1): Merge branch 'topic/config_prep_api' into next Vladimir Zapolskiy (2): dmaengine: mediatek: mtk-uart-apdma: Return -ENOMEM on memory allocat= ion failure dmaengine: hisilicon: Return -ENOMEM on dynamic memory allocation in = probe bui duc phuc (1): dmaengine: validate dev and name in dma_request_chan() .../devicetree/bindings/dma/altr,msgdma.yaml | 2 +- .../devicetree/bindings/dma/mediatek,uart-dma.yaml | 1 + .../devicetree/bindings/dma/qcom,bam-dma.yaml | 2 +- .../bindings/dma/xilinx/xlnx,axi-dma.yaml | 13 +- Documentation/driver-api/dmaengine/client.rst | 9 + MAINTAINERS | 4 +- drivers/crypto/atmel-aes.c | 10 +- drivers/dma/arm-dma350.c | 9 + drivers/dma/dmaengine.c | 9 +- drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 2 +- drivers/dma/dw-edma/dw-edma-core.c | 583 +++++++++++++----= ---- drivers/dma/dw-edma/dw-edma-core.h | 113 +++- drivers/dma/dw-edma/dw-edma-pcie.c | 264 ++++++---- drivers/dma/dw-edma/dw-edma-v0-core.c | 382 +++++++++----- drivers/dma/dw-edma/dw-hdma-v0-core.c | 265 ++++++---- drivers/dma/dw-edma/dw-hdma-v0-regs.h | 3 +- drivers/dma/fsl-edma-main.c | 2 + drivers/dma/fsl-edma-trace.h | 4 +- drivers/dma/fsl_raid.c | 58 +- drivers/dma/fsl_raid.h | 4 +- drivers/dma/hisi_dma.c | 2 +- drivers/dma/idxd/defaults.c | 12 +- drivers/dma/mediatek/mtk-uart-apdma.c | 2 +- drivers/dma/pl330.c | 19 +- drivers/dma/qcom/bam_dma.c | 1 + drivers/dma/qcom/hidma_ll.c | 6 +- drivers/dma/tegra210-adma.c | 12 +- drivers/dma/ti/k3-udma.c | 2 +- drivers/dma/xilinx/xilinx_dma.c | 66 ++- drivers/dma/xilinx/zynqmp_dma.c | 6 +- drivers/nvme/target/pci-epf.c | 33 +- drivers/pci/endpoint/functions/pci-epf-mhi.c | 52 +- drivers/pci/endpoint/functions/pci-epf-test.c | 8 +- include/linux/dma/edma.h | 51 +- include/linux/dmaengine.h | 151 +++++- 35 files changed, 1388 insertions(+), 774 deletions(-) --=20 ~Vinod --Aojo7tv4FSuvICl7 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmqMg4YACgkQfBQHDyUj g0fsSQ//e/gpywXkuUxVBB3OMgKy5v6bNAoeb+i5YKfu29Y//G09EmHOAZMUYiti z+6MkXQA97wjq9n0sY48L8XR6103prFLwVTDmjk6KsRv5ftlKpZDO2vzg0xdowyd 5Nl3q+sWdnPPcCm/Ow3CxR/hvnNHhhKU2GaPwwkdB1yPT4Is9it3igediAO2uCIj 9hKpkkpmvrn7pzWkqxTM6hP6Xu477MTfPV3dhanEIbAlVxX6Z2FDotfWexTmiZqL qRNkXB8HmoSIenfwPLigTcOEO3BIXRqGPx6kNaz40iTfSj8CFeDQflXrAJI5UzaY SPBnPpwh2wuXiEwwTKRt2ddYQd17Fosa9lnOW5/n968ZUcaaySSVac5pT0M3DzLC ottlDHwE4wwS0hUiOXh7SHWwfQ/J3yJtDbBn+9nJ/IEq6lE/H5xiHwzPw77IzxZC Io9Zs7mpgNwMqiX8mYOUJtFw3jshzzkOdptDZAVem8aGKeULw0sgS+F8WD9KcAWv /Q+tnHt242IlqiPeEaHHmPdcqanTpfi/8/ECg3/H3vYTEzyPYdRg517IUexTt9Jj d8zOVGpF8dfwXN+W5RYsOSxa8N/Zvn9ND0kMGRt7dKBhydMMF0I914JCedoD3szD rbpBPec0S0rLdrA5X7102cMHsUL17PVzr7DeCjXQ6IriQxRTReE= =FDti -----END PGP SIGNATURE----- --Aojo7tv4FSuvICl7--