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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-14324356931sm33810559c88.4.2026.09.06.19.26.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Sep 2026 19:26:08 -0700 (PDT) Date: Sun, 6 Sep 2026 19:26:06 -0700 From: Qiang Yu To: Konrad Dybcio Cc: Krishna Chaitanya Chundru , Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Bjorn Andersson , Maxime Chevallier , Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: Re: [PATCH v2 1/4] dt-bindings: phy: qcom: add Nord QMP PCIe PHY binding Message-ID: References: <20260828-nord-v2-0-18bf59d19d6f@oss.qualcomm.com> <20260828-nord-v2-1-18bf59d19d6f@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-GUID: sBiuZ2PCCBHfotQNpHp1cmCzlLv8rnM9 X-Proofpoint-ORIG-GUID: sBiuZ2PCCBHfotQNpHp1cmCzlLv8rnM9 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA3MDAyMSBTYWx0ZWRfX9wfFsgNY6xQ1 q0ySwMUbYeQxnmeKn/K2LOxMHPaZafeA38he5F7XZEbCSssJuF3sL4bGTo92HwuRAE4qzSvDhYS MBtRHYDccrLlG83zvMuWPy/oflbvJPQ= X-Authority-Analysis: v=2.4 cv=dfmwG3Xe c=1 sm=1 tr=0 ts=6a9e20c6 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=MuNgaGKqo7zVGC3JrMAA:9 a=CjuIK1q_8ugA:10 a=x9snwWr2DeNwDh03kgHS:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA3MDAyMSBTYWx0ZWRfXyv6Xdj4fM4iM mg6VJCzo7ZDAPeNP0fE+CJhVzW6tV0/kFrSde6txq2fWchg4DWTwFM5zjQ/cMO1U19bAiFYBZC+ N2gN+OxXv8o+D8qlx7eTwiZhWv5xyLq5xRPR6+8lJb6jKG/rlfWUhq0iDOoP5b2gNerwSDZ0BZo nw+Z4Y9TS8/foaAWl3TgpFWM+JzLXqlmxviur4ln5Gg704pLZnAxNaO1IZlsca39R73EHEKXCCQ ZQWmDytseZ/sfAvNzaYQAiAXoLBFJrTpFKi8PjJXgxXaZvVNmEkpdIfyR05u5zuAlobZApU1uBE AAEhv0tVNtSdlbuuYOeYNmgxE0YLsHX4h8n1sYUYO7pJFvlL/wRWqm438CFC/kgLeJYjsS5sO5x 71rllqyvyIb5zYBUnnIrQns8oatPggNZbu8jvTtJrAHWbYG0w3Tcaht/J0drrIXrlDZd0ckMl7u kB2yK6VdBBYVSgljoyQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-06_04,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 priorityscore=1501 spamscore=0 malwarescore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 suspectscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609070021 On Mon, Aug 31, 2026 at 09:54:40AM +0200, Konrad Dybcio wrote: > On 8/28/26 10:43 AM, Krishna Chaitanya Chundru wrote: > > Document the PCIe PHY found on the Qualcomm Nord platform. > > > > Nord has a Gen5-capable QMP PCIe PHY that can operate in multiple > > lane configurations using four PHY segments (A/B/C/D). The active > > topology is selected by firmware through a TCSR configuration > > register and may be configured as x16, x8+x8, x8+x4+x4, or > > x8+x4+x2+x2. > > > > The binding describes the register regions, clocks, resets, power > > domains, regulators, PHY provider interface, clock provider interface, > > and the qcom,link-mode property used by the driver to discover the > > active lane configuration programmed by firmware. > > > > Signed-off-by: Krishna Chaitanya Chundru > > --- > > .../phy/qcom,nord-qmp-gen5x16-pcie-phy.yaml | 276 +++++++++++++++++++++ > > 1 file changed, 276 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/phy/qcom,nord-qmp-gen5x16-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,nord-qmp-gen5x16-pcie-phy.yaml > > new file mode 100644 > > index 000000000000..37198f82c611 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/qcom,nord-qmp-gen5x16-pcie-phy.yaml > > @@ -0,0 +1,276 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/phy/qcom,nord-qmp-gen5x16-pcie-phy.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm Nord QMP Bifurcated PCIe PHY > > Quadfurcated, perhaps? Is there a word in the spec that doesn't get too > detailed about the number of effective slots that the PHY is divided into? > What about multiple link-mode PHY? - Qiang Yu > [...] > > > + vdda-phy-a-supply: true > > + > > + vdda-phy-b-supply: true > > + > > + vdda-phy-c-supply: true > > + > > + vdda-phy-d-supply: true > > + > > + vdda-pll-a-supply: true > > + > > + vdda-pll-b-supply: true > > + > > + vdda-pll-c-supply: true > > + > > + vdda-pll-d-supply: true > > I'm really surprised they aren't all connected to the same pair but oh well > > Konrad >