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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-143243f780csm22004832c88.13.2026.09.06.22.05.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Sep 2026 22:05:40 -0700 (PDT) Date: Mon, 7 Sep 2026 10:35:33 +0530 From: Varadarajan Narayanan To: george.moussalem@outlook.com Cc: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 01/10] usb: dwc3: core: Allow glue layer to pass reference clock rate Message-ID: References: <20260906-ipq-flatten-usb-v3-0-13e4e0f63123@outlook.com> <20260906-ipq-flatten-usb-v3-1-13e4e0f63123@outlook.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260906-ipq-flatten-usb-v3-1-13e4e0f63123@outlook.com> X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA3MDA1MSBTYWx0ZWRfX1Zqe0xwkPeK+ Qr9vkLTCg2D85UTU+NModXkrmwyXJwAZwZ9QbCO+fmnSzTzv5Ti/NqpiXXpuoT3kAbqYVYx/B+t olb7ipFPPDuqTDKseC7t4C+M9z0cML7LoT+4PGcKn/bTL1+PJTYpoVX02+5PX5Vt/TF3gdIk+5y 68q3v+nEjc46qQGaeVs02ZCzVzW/kfRibRdaDmb4W9SlkU+bOQtvEx7z/24Jet2klDRbGbB4GJe VaeO7U/f9lZTYUO5SxVNA1/zaHzhbHFZWpol4RYo4A7gE58o7pdnZCpBF2t4MErp0eOcFAC9+Qv Kk+VD0SQBDbZD1yvU7P2bhkT7a6xdxsT3Udv3SBD+KTr7Nmd6Pdgn6egnTgXSpasYnKi0ufvj62 76anYGwQNpPLZgfYq2z0+mTbCpYWMph9t7b0XM/4IAHMJzkbOP9fOCboZTqUr7LaJa6pxj/Sy2p 4Xdr+9x/a1wQSXklt6Q== X-Proofpoint-GUID: N4vz650bRbrTcZMLThkeTOMbm4W_0NJK X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA3MDA1MSBTYWx0ZWRfX6Z/1322I/7t0 cDu90u9DQik6UtZSZKeiY7Gc/DWSnXkN5kmFYcJ17I7DZrzpBzKXSLMF9BCI5/rtig6GrFZX7Wv LTN7tJxM1CY5e1aPytRXw9PK5bN0u/Q= X-Authority-Analysis: v=2.4 cv=daOwG3Xe c=1 sm=1 tr=0 ts=6a9e4626 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=UqCG9HQmAAAA:8 a=EUspDBNiAAAA:8 a=59Yo_YLqCPc3mkuWIEsA:9 a=CjuIK1q_8ugA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-ORIG-GUID: N4vz650bRbrTcZMLThkeTOMbm4W_0NJK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-07_01,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 bulkscore=0 spamscore=0 phishscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 impostorscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609070051 On Sun, Sep 06, 2026 at 08:46:40AM +0400, George Moussalem via B4 Relay wrote: > From: George Moussalem > > Add ability to pass the reference clock rate from the glue layer to the > DWC3 core driver. The core calculates the reference clock period and > frame length adjustment based on the reference clock rate. > > In the flattened snsp-dwc3 model, it is currently not possible to pass a > reference clock that differs from the default since: > commit 613a2e655d4d ("usb: dwc3: core: Expose core driver as library") > > The new glue layers (incl. Qualcomm's) set the ignore_clocks_and_resets > flag in dwc3_probe_data to true, which disables the core driver's clock > management, thus it also doesn't acquire the reference clock from the > devicetree needed in dwc3_ref_clk_period. > > There's an existing DT property 'snps,ref-clock-period-ns', but that's > been deprecated. In addition, basing the rate from the period is often > not accurate enough to derive the frame length adjustment value. > > This prevents moving chipsets such as IPQ5018, IPQ6018, IPQ5332, IPQ5424 > and IPQ9574 with a reference clock rate that computes values for the > period and frame length adjustment different from the hardware default > from moving to the flattened model. > > So, add ability to set the reference clock rate in dwc3_probe_data, then > have the core obtain the clock rate and use that to calculate the > required period and frame length adjustment. > > Signed-off-by: George Moussalem Reviewed-by: Varadarajan Narayanan