mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: "Lorenzo Stoakes (ARM)" <ljs@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	 Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Joey Gouly <joey.gouly@arm.com>,
	 Suzuki K Poulose <suzuki.poulose@arm.com>,
	Shuah Khan <shuah@kernel.org>, Oliver Upton <oupton@kernel.org>,
	 Fuad Tabba <fuad.tabba@linux.dev>,
	Peter Maydell <peter.maydell@linaro.org>,
	 Leonardo Bras <leo.bras@arm.com>,
	Wei-Lin Chang <weilin.chang@arm.com>,
	 Yao Yuan <yaoyuan@linux.alibaba.com>,
	linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
	 kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v20 03/14] KVM: arm64: Manage GCS access and registers for guests
Date: Mon, 7 Sep 2026 15:14:34 +0100	[thread overview]
Message-ID: <ap7GPxGs3nhT70sS@gremlin> (raw)
In-Reply-To: <apszJZ17KUvd6BJ7@sirena.co.uk>

On Fri, Sep 04, 2026 at 10:07:49PM +0100, Mark Brown wrote:
> On Fri, Sep 04, 2026 at 09:54:51AM +0100, Lorenzo Stoakes (ARM) wrote:
> > On Thu, Sep 03, 2026 at 09:41:26PM +0100, Mark Brown wrote:
>
> > > originally written the code without expressing this dependency but on a
> > > previous version Marc asked for this nesting as an optimisation.  Since
> > > it's about optimisastion adding checks that don't otherwise exist on the
> > > restore path would doubtless get the similar complaints.  Exactly the
> > > same concerns were raised on v19.
>
> > Could you implement the nesting the same in the cases where there is a bare
> > ctx_has_gcs() as an alternative?
>
> > So then it'd always be tcrx -> s1pie -> gcs everywhere and that'd resolve things
> > also and make things symmetric.
>
> > You could also I think express the dependency if it makes sense to.
>
> Clearly we *can*, it's a question of what'd be acceptable - it'd result
> in the compiler emitting a bunch of extra alternatives and conditionals
> in the context switch path.

Right. And that's presumably a rather _sensitive_ bit of code.

>
> > > We could do checking of the ID registers at vCPU creation so we could
> > > avoid worrying about them in the fast path but there was also feedback
> > > about not doing that.  One idea I had was to generate feature
>
> > Could you possibly check in sanitise_id_aa64pfr1_el1(), something like:
>
> Sanitising the writes is a bit tricky since multiple ID registers are
> involved, TCRX and S1PIE are in ID_AA64MMFR3_EL1 while GCS is in
> ID_AA64PFR1_EL1 so you'd create an ordering constraint for userspace,
> and you'd also have to handle the case where TCR2 or S1PIE are turned
> off with GCS already enabled.  It feels like a bunch of complication,
> especially if you start applying the same approach with other features.

Yeah, you're right, it is a bit of a nightmare and feels like it could get
a bit combinatorial.

>
> If we're going to validate the ID registers it feels safer to check at
> the point where we finalise the ID registers and refuse to start the
> vCPU if there's an unsupportable configuration, that would mean the
> check would only need to be done in one place and userspace wouldn't
> trip over any ordering requirements with how it updates registers.  Only
> userspaces that set architecturally invalid configurations should see an
> error.  We could also handle things by fixing up the configuration at
> the same point, disabling features that are missing their dependencies,
> that's a bit more friendly in the short term but could lead to trouble
> later on as it means we hide issues in userspace.
>
> I think the best thing overall would be to leave the runtime paths as
> they are and refuse to run with an architecturally invalid setup, that
> would avoid bloating the fast path.

Ack, it'd be nice to not have to worry about that.

Presumably we definitely want an oops on a GCS violation in general?

--
Cheers, Lorenzo

  reply	other threads:[~2026-09-07 14:14 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-01 21:46 [PATCH v20 00/14] KVM: arm64: Provide guest support for GCS Mark Brown
2026-09-01 21:46 ` [PATCH v20 01/14] arm64/gcs: Ensure FGTs for EL1 GCS instructions are disabled Mark Brown
2026-09-03 16:10   ` Lorenzo Stoakes (ARM)
2026-09-01 21:47 ` [PATCH v20 02/14] KVM: arm64: Fix FGT mapping for HFGITR_EL2.nGCSEPP Mark Brown
2026-09-03 16:23   ` Lorenzo Stoakes (ARM)
2026-09-03 19:29     ` Mark Brown
2026-09-01 21:47 ` [PATCH v20 03/14] KVM: arm64: Manage GCS access and registers for guests Mark Brown
2026-09-02 16:44   ` Leonardo Bras
2026-09-03 20:52     ` Mark Brown
2026-09-03 18:13   ` Lorenzo Stoakes (ARM)
2026-09-03 20:41     ` Mark Brown
2026-09-04  8:54       ` Lorenzo Stoakes (ARM)
2026-09-04 21:07         ` Mark Brown
2026-09-07 14:14           ` Lorenzo Stoakes (ARM) [this message]
2026-09-07 14:55             ` Mark Brown
2026-09-09 11:34               ` Lorenzo Stoakes (ARM)
2026-09-01 21:47 ` [PATCH v20 04/14] KVM: arm64: Ensure GCS memory effects are visible Mark Brown
2026-09-02 16:30   ` Leonardo Bras
2026-09-04 12:16   ` Lorenzo Stoakes (ARM)
2026-09-01 21:47 ` [PATCH v20 05/14] KVM: arm64: Set PSTATE.EXLOCK when entering an exception Mark Brown
2026-09-03 14:25   ` Leonardo Bras
2026-09-03 16:20     ` Mark Brown
2026-09-03 16:40       ` Leonardo Bras
2026-09-04 13:04   ` Lorenzo Stoakes (ARM)
2026-09-01 21:47 ` [PATCH v20 06/14] KVM: arm64: Validate GCS exception lock when emulating ERET Mark Brown
2026-09-03 15:37   ` Leonardo Bras
2026-09-03 19:22     ` Mark Brown
2026-09-04 13:16       ` Leonardo Bras
2026-09-04 21:56         ` Mark Brown
2026-09-07 10:55           ` Leonardo Bras
2026-09-01 21:47 ` [PATCH v20 07/14] KVM: arm64: Forward GCS exceptions to nested guests Mark Brown
2026-09-09 13:00   ` Leonardo Bras
2026-09-01 21:47 ` [PATCH v20 08/14] KVM: arm64: Enforce EXLOCK for SPSR and ELR Mark Brown
2026-09-09 14:35   ` Leonardo Bras
2026-09-01 21:47 ` [PATCH v20 09/14] KVM: arm64: Allow GCS to be enabled for guests Mark Brown
2026-09-09 16:34   ` Leonardo Bras
2026-09-09 16:45     ` Mark Brown
2026-09-01 21:47 ` [PATCH v20 10/14] KVM: selftests: arm64: Add GCS registers to get-reg-list Mark Brown
2026-09-09 16:46   ` Leonardo Bras
2026-09-01 21:47 ` [PATCH v20 11/14] KVM: selftests: arm64: Add GCS to set_id_regs Mark Brown
2026-09-09 16:55   ` Leonardo Bras
2026-09-01 21:47 ` [PATCH v20 12/14] KVM: selftests: arm64: Only restore SPSR_EL1 and ELR_EL1 if they change Mark Brown
2026-09-09 17:03   ` Leonardo Bras
2026-09-01 21:47 ` [PATCH v20 13/14] tools: Synchronise the kernel esr.h Mark Brown
2026-09-10 11:10   ` Leonardo Bras
2026-09-01 21:47 ` [PATCH v20 14/14] KVM: selftests: arm64: Add GCS EXLOCK exception emulation test Mark Brown
2026-09-10 17:20   ` Leonardo Bras
2026-09-10 18:26     ` Mark Brown
2026-09-11 11:02       ` Leonardo Bras

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ap7GPxGs3nhT70sS@gremlin \
    --to=ljs@kernel.org \
    --cc=broonie@kernel.org \
    --cc=catalin.marinas@arm.com \
    --cc=fuad.tabba@linux.dev \
    --cc=joey.gouly@arm.com \
    --cc=kvmarm@lists.linux.dev \
    --cc=leo.bras@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-kselftest@vger.kernel.org \
    --cc=maz@kernel.org \
    --cc=oupton@kernel.org \
    --cc=peter.maydell@linaro.org \
    --cc=shuah@kernel.org \
    --cc=suzuki.poulose@arm.com \
    --cc=weilin.chang@arm.com \
    --cc=will@kernel.org \
    --cc=yaoyuan@linux.alibaba.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®