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Date: Thu, 27 Aug 2026 11:23:08 +0100
From: Will Deacon <will@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Fuad Tabba <fuad.tabba@linux.dev>, linux-arm-kernel@lists.infradead.org,
	Marc Zyngier <maz@kernel.org>, Oliver Upton <oupton@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mark Brown <broonie@kernel.org>, kvmarm@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] arm64: Don't read GMID_EL1 when MTE is disabled
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In-Reply-To: <ao7Isu9sxUEeECOZ@arm.com>

On Wed, Aug 26, 2026 at 12:06:26PM +0100, Catalin Marinas wrote:
> On Tue, Aug 25, 2026 at 03:46:15PM +0100, Fuad Tabba wrote:
> > On Tue, 25 Aug 2026 at 15:14, Will Deacon <will@kernel.org> wrote:
> > ...
> > > > > If you are worried about additional trapping of the MRS, we should go
> > > > > for Will's improvement to always read the cached values in
> > > > > __read_sysreg_by_encoding().
> > > >
> > > > Not worried :) __cpuinfo_store_cpu() has already read ID_AA64PFR1_EL1
> > > > a few lines up.
> > >
> > > But if you go with __read_sysreg_by_encoding() then you'd still be
> > > reading it (and trapping) twice, no?
> > 
> > It would, and I'm fine with that on a CPU bring-up path.
> 
> For backports, yes. Going forward, I like Will's idea of reading the
> cached value in __read_sysreg_by_encoding().

I'll try to incorporate that on the end of my parallel hotplug series,
which I intend to post next week. I just need to untangle the mpam stuff,
as it populates the cpuinfo structure far too late.

Will