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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3286f8095bcsm2951686eec.12.2026.08.28.00.26.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2026 00:26:13 -0700 (PDT) Date: Fri, 28 Aug 2026 15:26:08 +0800 From: Shawn Guo To: Bartosz Golaszewski Cc: Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH] pinctrl: qcom: nord: Split QUP1 SE2/SE3 into lane-pair functions Message-ID: References: <20260819152356.904023-1-shengchao.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260819152356.904023-1-shengchao.guo@oss.qualcomm.com> X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI4MDA2MiBTYWx0ZWRfX6h17LJzAwCAI IbEMQi3Fmsgg9JC+CFt7bzNeN4NWk89XV2QeYF9m4zjPFug1YuqT6ZgM3q38iqcFpRlF6RLzfvY prKfWI42hiO3CQLmQUyE8ie00GQdp8CPos/EosXnQQ52qZV5GcqgYMkdqZyZ///KIJUCOGs1QWD BtNFFOdsokEiSGCPKMVYb2qWz76fBQeOOKskf2XypbN7zrOYHGVzL11VAaRyUWzhHrHBEfUxy7V J6SN9wqpMDktfuWmBI9QKdhHy92RpnnopUCqBnhyUy0vcXwDCTP4tB1dFrI+RjG9/xSosi35/+2 LOACY/1fJolamLf259lwdplLlfkXPFeNPHK/XM7qJHsAeo8W/P+gMBaHWWmN/MjzYVlPsDZAldA ymLaqKKKM9+RK3HDPt7fTudD2P8eOTts1hqj7K1ztcx+Z+Ok51aRnizH+8ytvYAFHvt9sDIWABI oIUdgHRUXsO97e9R9MA== X-Authority-Analysis: v=2.4 cv=d5DFDxjE c=1 sm=1 tr=0 ts=6a913817 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=kj9zAlcOel0A:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=2HO_7AbmPCLmE9qJQqQA:9 a=CjuIK1q_8ugA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-GUID: 3BoBflMHcJJpRdUw0FVmVyEDUsVMJeaS X-Proofpoint-ORIG-GUID: 3BoBflMHcJJpRdUw0FVmVyEDUsVMJeaS X-Proofpoint-Spam-Info: AW1haW4tMjYwODI4MDA2MiBTYWx0ZWRfX0lLEFz0WFY1C c9Y6YtBdeVnbL58oGp9dSFHCm0P1n2v1QwDcygti6rTbfBahrU38s2td/UMiW8PrkCWq4+qh26d H/YwcIBDgmqV+mQBXDIDVz/WVlrmO+Y= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-28_02,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 spamscore=0 adultscore=0 suspectscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608280062 On Wed, Aug 19, 2026 at 11:23:56PM +0800, Shawn Guo wrote: > QUP1 SE2 and SE3 pack all four of their lanes pair-wise onto only two > pins each: lanes 0/1 (I2C SDA/SCL) at mux value 2 and lanes 2/3 (UART > TX/RX) at mux value 1, on gpio127/gpio128 and gpio129/gpio130 > respectively. > > Both mux values were named "qup1_se2" (respectively "qup1_se3"), so the > two distinct lane pairs became indistinguishable. msm_pinmux_set_mux() > stops at the first entry matching the requested function, which means > mux value 1 was always selected and the I2C lanes could never be muxed > out. In practice i2c9 and i2c10 got the UART lanes and did not work, > while uart9 and uart10 happened to be muxed correctly. > > Give each lane pair its own function, following the _01/_23 naming > already used for the same hardware arrangement by the shikra, eliza, > hawi and maili TLMM drivers. Both functions still cover the full pin > pair, so a single pinctrl state per protocol remains sufficient. > > Drop gpio129/gpio130 from the SE2 group list, since those pins > belong to SE3 and were never reachable through the SE2 function. > > Also rename QUP1 SE2/SE3 functions in the binding doc accordingly. > > While at it, add missing QUP3 SE0 functions qup3_se0_mira and > qup3_se0_mirb to the binding doc. Just spot that "gpio" is also missing from function enum list in the binding. Will send v2. Shawn > > Fixes: c24dd0826f06 ("pinctrl: qcom: add the TLMM driver for the Nord platforms") > Cc: stable@vger.kernel.org > Assisted-by: LLM > Signed-off-by: Shawn Guo