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Fri, 28 Aug 2026 07:33:36 -0700 (PDT) Date: Fri, 28 Aug 2026 18:33:28 +0400 From: Ahmed Naseef To: Krzysztof Kozlowski Cc: Ahmed Naseef , linux-gpio@vger.kernel.org, Benjamin Larsson , Christian Marangi , Conor Dooley , Krzysztof Kozlowski , Linus Walleij , Lorenzo Bianconi , Mikhail Kshevetskiy , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH 2/3] dt-bindings: pinctrl: Add EcoNet EN7528 pin controller Message-ID: References: <7e6150b186c2d16820d7382bce065596a0854a47.1786262697.git.naseefkm@gmail.com> <20260828-adorable-bug-from-arcadia-fcad00@quoll> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260828-adorable-bug-from-arcadia-fcad00@quoll> On Fri, Aug 28, 2026 at 08:59:57AM +0200, Krzysztof Kozlowski wrote: > On Sun, Aug 09, 2026 at 12:04:59PM +0400, Ahmed Naseef wrote: > > +maintainers: > > + - Lorenzo Bianconi > > + > > +description: > > + The EcoNet EN7528 pin controller is used to control SoC pins. It shares the > > + IP with the Airoha pin controllers, but its IOMUX and pin configuration > > + registers have a different layout. > > + > > +properties: > > + compatible: > > + const: econet,en7528-pinctrl > > + > > + airoha,chip-scu: > > + description: phandle to the chip SCU syscon > > + $ref: /schemas/types.yaml#/definitions/phandle > > If the entire address space is part of the SCU, then this device should > be part of the SCU, e.g. its subnode. It is not: the registers are split over two blocks. The GPIO, interrupt and PWM flash-mode registers are in the block the node sits under, and the IOMUX and pin configuration registers are in the SCU. Both are needed, so whichever of the two is the parent, the other one has to come in by phandle. > > > + > > + interrupts: > > + maxItems: 1 > > + > > + gpio-controller: true > > + > > + '#gpio-cells': > > + const: 2 > > + > > + gpio-ranges: > > + maxItems: 1 > > + > > + interrupt-controller: true > > + > > + '#interrupt-cells': > > + const: 2 > > + > > +allOf: > > This goes to the end of the file, before the additionalProperties. > Will address in v2. > > + - $ref: pinctrl.yaml# > > + > > +required: > > + - compatible > > + - airoha,chip-scu > > + - interrupts > > + - gpio-controller > > + - gpio-ranges > > + - "#gpio-cells" > > + - interrupt-controller > > + - "#interrupt-cells" > > + > > +patternProperties: > > + '-pins$': > > + type: object > > "patternProperties" should follow "properties" > Will address in v2. Thanks for the review! Ahmed > > + > > + patternProperties: > > + '^mux(-|$)': > > + type: object > > + > > + description: > > + pinmux configuration nodes. > > + > > + $ref: /schemas/pinctrl/pinmux-node.yaml > > + > > + properties: > > + function: > > + description: > > + A string containing the name of the function to mux to the group. > > + enum: [gpio, jtag, pcie_reset, pcm, pcm_spi, phy1_led0, > > + phy1_led1, phy2_led0, phy2_led1, phy3_led0, phy3_led1, > > + phy4_led0, phy4_led1, pnand, pon, pwm, sipo, spi, uart] > > Best regards, > Krzysztof