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[77.7.17.232]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48448ed2edfsm7345851f8f.23.2026.09.02.10.00.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 10:00:20 -0700 (PDT) Date: Wed, 2 Sep 2026 18:58:22 +0200 From: Karl Mehltretter To: Anshuman Khandual Cc: Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, Ryan Roberts , Mark Rutland , Andrew Morton , Muchun Song , Oscar Salvador , David Hildenbrand , linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: hugetlb: fix BBM for mprotect() on contiguous PTEs Message-ID: References: <20260901131823.15799-1-kmehltretter@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Sep 02, 2026 at 10:08:58AM +0100, Anshuman Khandual wrote: > No user-visiable failure was reported even without this change ? > Missing TLBI as seen in QEMU is the only clue here ?A This came out of an experiment to add warnings for architectural details that QEMU does not normally model. The checker tracks guest page-table writes and TLBIs using a shadow TLB. It reported 3072 contiguous PTE transitions without an intervening TLBI on the unpatched kernel, none with this change, and none for the already-flushed write-protect control. Together with the code history, that was the basis for the patch. As noted in the testing section, no user-visible failure was reproduced. I also tested an unpatched kernel on a Raspberry Pi 400. The Cortex-A72's L1 data-TLB refill ratio was approximately 1:16 for the 64K hugetlb mapping versus a forced-4K control, indicating that it amalgamated the 16 contiguous PTEs. A contended test still completed 85,396 full-range permission changes and about 2.8 billion reads without a fault or data mismatch. > But you have not seen any real TLB conflicts even on custom QEMU ? No. QEMU does not model the stage-1 Contiguous hint as a combined TLB entry. The added checker only logged the page-table/TLBI sequence, it did not change translation behaviour or inject TLB conflicts. Thanks, Karl