Re: [PATCH v2] PCI: Allow D3 for native Hotplug capable Root Ports on non-x86 platforms

[Lukas Wunner <lukas@wunner.de>]

On Wed, Sep 02, 2026 at 07:09:58PM +0200, Konrad Dybcio wrote:
> > On Wed, Jul 29, 2026 at 06:50:05PM +0200, Manivannan Sadhasivam wrote:
> >> Commit eb3b5bf1a88d ("PCI: Whitelist native hotplug ports for runtime D3"),
> >> prevented native Hotplug capable Root Ports from entering D3 citing issues
> >> on old Intel SkyLake Xeon-SP platform.
> >>
> >> But there is no reason to restrict D3 for native Hotplug capable Root
> >> Ports on non-x86 platforms. We recently enabled D3 on non-Hotplug capable
> >> Root Ports on non-x86 platforms (specifically for DT platforms) in commit
> >> a5fb3ff63287 ("PCI: Allow PCI bridges to go to D3Hot on all non-x86"). So
> >> do the same for native Hotplug capable Root Ports as well.
> 
> This breaks system suspend entry (crashes the system) on Qualcomm SC8280XP
> CRD.. this SoC is known for fragile PCIe.
> 
> It doesn't repro on e.g. the Qualcomm Glymur CRD (2 gens newer), perhaps we
> need an explicit opt-out like
> 
> if (of_machine_is_compatible("qcom,sc8280xp"))
> 
> or some targetted fix inside the qcom driver

That's precisely the reason why x86 uses a BIOS cut-off date of 2015
in pci_bridge_d3_possible():  Root Ports on older SoCs were never
validated for D3hot and are known to cause crashes etc when low
power states are used.

Thanks,

Lukas