From: Vinod Koul <vkoul@kernel.org>
To: Devendra K Verma <devverma@amd.com>
Cc: mani@kernel.org, frank.li@kernel.org, den@valinux.co.jp,
dmaengine@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, michal.simek@amd.com
Subject: Re: [PATCH v5 0/2] CPM6 Channel Separation Support
Date: Thu, 3 Sep 2026 21:50:56 +0530 [thread overview]
Message-ID: <apmeaBVeVVQ0nCMi@vaman> (raw)
In-Reply-To: <20260820091025.683506-1-devverma@amd.com>
On 20-08-26, 14:40, Devendra K Verma wrote:
> 'Designware Cores PCI Express DM Controller - Reference
> Manual', section 3.2.34.3, VSEC for DEVICE INFORMATION supports
> the channel separation mechanisms. Basically, the HDMA IP allows
> the user to configure the separation between DMA channel
> registers and retrieve it via the VSEC capability mentioned
> above.
> In order to use the VSEC functionality following changes have
> been made:
This does not apply for me, can you please rebase
--
~Vinod
prev parent reply other threads:[~2026-09-03 16:21 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-20 9:10 Devendra K Verma
2026-08-20 9:10 ` [PATCH v5 1/2] dmaengine: dw-edma: Enable Chan Separation via VSEC Devendra K Verma
2026-08-20 9:10 ` [PATCH v5 2/2] dmaengine: dw-edma: Add changes to support Channel Separation Devendra K Verma
2026-08-20 15:22 ` Frank Li
2026-08-21 14:25 ` Verma, Devendra
2026-09-03 16:20 ` Vinod Koul [this message]
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