From: Manivannan Sadhasivam <mani@kernel.org>
To: hongxing.zhu@oss.nxp.com
Cc: frank.li@nxp.com, l.stach@pengutronix.de, lpieralisi@kernel.org,
kwilczynski@kernel.org, robh@kernel.org, bhelgaas@google.com,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev,
linux-kernel@vger.kernel.org, Richard Zhu <hongxing.zhu@nxp.com>
Subject: Re: [PATCH v2] PCI: imx6: Add runtime PM support for i.MX95
Date: Thu, 16 Jul 2026 18:43:48 +0200 [thread overview]
Message-ID: <aprkipjl3lpdn37dlcdv7wx6piepbbqjsd6ljfgpa5pmua2axu@etxjfuahtg3u> (raw)
In-Reply-To: <20260708035928.580236-1-hongxing.zhu@oss.nxp.com>
On Wed, Jul 08, 2026 at 11:59:26AM +0800, hongxing.zhu@oss.nxp.com wrote:
> From: Richard Zhu <hongxing.zhu@nxp.com>
>
> Enable runtime PM support for i.MX95 PCIe Root Complex to allow dynamic
> power management when the PCIe link is idle.
>
> The i.MX95 PCIe controller supports entering D3hot state when PCIe
> devices are not actively in use. This implementation uses
> pm_runtime_no_callbacks() to leverage the PCI core's generic runtime PM
> handling. The PCI core automatically manages D-state transitions based
> on the runtime PM state of connected endpoint devices.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Please resend this patch separately. Currently, you've sent other patches as a
reply to this patch which just messes up the order.
- Mani
> ---
> Changes in v2:
> Use devm_pm_runtime_set_active_enabled() simplify the codes and error
> path.
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index eae495a1b7990..578410f262aed 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -130,6 +130,7 @@ enum imx_pcie_variants {
> #define IMX_PCIE_FLAG_SKIP_L23_READY BIT(12)
> /* Preserve MSI capability for platforms that require it */
> #define IMX_PCIE_FLAG_KEEP_MSI_CAP BIT(13)
> +#define IMX_PCIE_FLAG_PM_RUNTIME BIT(14)
>
> #define imx_check_flag(pci, val) (pci->drvdata->flags & val)
>
> @@ -1973,6 +1974,13 @@ static int imx_pcie_probe(struct platform_device *pdev)
> */
> imx_pcie_add_lut_by_rid(imx_pcie, 0);
> } else {
> + if (imx_pcie->drvdata->flags & IMX_PCIE_FLAG_PM_RUNTIME) {
> + pm_runtime_no_callbacks(dev);
> + ret = devm_pm_runtime_set_active_enabled(dev);
> + if (ret < 0)
> + return ret;
> + }
> +
> /*
> * i.MX RC is powered off during suspend, force L2 entry to
> * ensure proper endpoint notification before power loss.
> @@ -2121,6 +2129,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .flags = IMX_PCIE_FLAG_HAS_SERDES |
> IMX_PCIE_FLAG_HAS_LUT |
> IMX_PCIE_FLAG_8GT_ECN_ERR051586 |
> + IMX_PCIE_FLAG_PM_RUNTIME |
> IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
> .ltssm_off = IMX95_PE0_GEN_CTRL_3,
> .ltssm_mask = IMX95_PCIE_LTSSM_EN,
> --
> 2.34.1
>
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2026-07-16 16:44 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 3:59 hongxing.zhu
2026-07-08 3:59 ` [PATCH v2] PCI: imx6: Fix i.MX6Q/DL boot hang by separating PHY power and reference clock control hongxing.zhu
2026-07-08 15:28 ` Frank Li
2026-07-14 12:51 ` Francesco Dolcini
2026-07-15 1:38 ` Hongxing Zhu (OSS)
2026-07-16 14:43 ` Leonardo Costa
2026-07-17 6:10 ` Francesco Dolcini
2026-07-16 16:35 ` Manivannan Sadhasivam
2026-07-17 8:57 ` Hongxing Zhu (OSS)
2026-07-17 23:14 ` Bjorn Helgaas
2026-07-08 3:59 ` [PATCH v2] PCI: imx6: Update MPLLB bandwidth to improve i.MX95 Gen3 PCIe stability hongxing.zhu
2026-07-08 15:19 ` Frank Li
2026-07-09 7:55 ` Hongxing Zhu (OSS)
2026-07-09 15:08 ` Frank Li
2026-07-16 16:43 ` Manivannan Sadhasivam [this message]
2026-07-17 2:34 ` [PATCH v2] PCI: imx6: Add runtime PM support for i.MX95 Hongxing Zhu (OSS)
2026-07-17 16:30 ` Frank Li
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