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From: Yeoreum Yun <yeoreum.yun@arm.com>
To: Mike Leach <mike.leach@arm.com>
Cc: Yeoreum Yun <yeoreum.yun@arm.com>,
	James Clark <james.clark@linaro.org>, Leo Yan <leo.yan@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Sebastian Andrzej Siewior <bigeasy@linutronix.de>,
	Clark Williams <clrkwllms@kernel.org>,
	Steven Rostedt <rostedt@goodmis.org>,
	nd@arm.com
Subject: Re: [PATCH v11 1/9] coresight: etm4x: prohibit modifying ss_status and cntr_val while session is enabled
Date: Fri, 18 Sep 2026 18:08:11 +0100	[thread overview]
Message-ID: <aq1v-yo7gsQHasZP@e129823.arm.com> (raw)
In-Reply-To: <89b18b1e-65ca-4e97-b827-90d360b9e881@arm.com>

Hi Mike,

> Hi,
> 
> Preventing a write to the counter value register is correct, but protecting
> the ss_status is redundant.
> 
> On 9/15/26 12:34, Yeoreum Yun wrote:
> > ss_status and cntr_val are overwritten with the values read from the
> > corresponding registers by etm4_disable_hw() when the session is disabled.
> > 
> > This means that any changes to these values made while the session is
> > enabled would be lost when the session is disabled.
> > 
> > Therefore, prohibit modifying ss_status and cntr_val while the session is
> > enabled.
> > 
> > Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
> > ---
> >   drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 6 ++++++
> >   1 file changed, 6 insertions(+)
> > 
> > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> > index cc6cdd3ae29d5..8d73248b840a6 100644
> > --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> > +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> > @@ -1613,6 +1613,8 @@ static ssize_t cntr_val_store(struct device *dev,
> >   		return -EINVAL;
> >   	if (val > ETM_CNTR_MAX_VAL)
> >   		return -EINVAL;
> > +	if (coresight_get_mode(drvdata->csdev))
> > +		return -EBUSY;
> >   	raw_spin_lock(&drvdata->spinlock);
> >   	idx = config->cntr_idx;
> > @@ -1797,6 +1799,8 @@ static ssize_t sshot_ctrl_store(struct device *dev,
> >   	if (kstrtoul(buf, 16, &val))
> >   		return -EINVAL;
> > +	if (coresight_get_mode(drvdata->csdev))
> > +		return -EBUSY;
> 
> This is protecting a write clearing the STATUS bit in TRCSSCSR - but this is
> cleared automatically when next time the hardware is enabled in
> etm4_enable_hw(). So the write to ss_status in this function is redundant as
> is this protection.
> 
> The actual write to the targeted control register will persist.

Acked, I'll remove this protection in here.

Thanks!

[...]

-- 
Sincerely,
Yeoreum Yun

  reply	other threads:[~2026-09-18 17:08 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15 11:34 [PATCH v11 0/9] fix several inconsistencies with sysfs configuration in etmX Yeoreum Yun
2026-09-15 11:34 ` [PATCH v11 1/9] coresight: etm4x: prohibit modifying ss_status and cntr_val while session is enabled Yeoreum Yun
2026-09-15 11:51   ` sashiko-bot
2026-09-15 13:26     ` Yeoreum Yun
2026-09-18 11:14   ` Mike Leach
2026-09-18 17:08     ` Yeoreum Yun [this message]
2026-09-15 11:34 ` [PATCH v11 2/9] coresight: etm3x: prohibit modifying cntr_val and reset " Yeoreum Yun
2026-09-15 11:48   ` sashiko-bot
2026-09-15 13:30     ` Yeoreum Yun
2026-09-15 13:55       ` Yeoreum Yun
2026-09-18 11:15   ` Mike Leach
2026-09-15 11:34 ` [PATCH v11 3/9] coresight: etm4x: fix inconsistencies with sysfs configuration Yeoreum Yun
2026-09-15 11:53   ` sashiko-bot
2026-09-15 12:36     ` Yeoreum Yun
2026-09-18 13:49   ` Mike Leach
2026-09-18 17:00     ` Yeoreum Yun
2026-09-15 11:34 ` [PATCH v11 4/9] coresight: etm3x: " Yeoreum Yun
2026-09-15 11:47   ` sashiko-bot
2026-09-15 13:42     ` Yeoreum Yun
2026-09-18 13:57   ` Mike Leach
2026-09-18 17:09     ` Yeoreum Yun
2026-09-15 11:34 ` [PATCH v11 5/9] coresight: etm3x: remove redundant cpu online check on etm_enable_sysfs() Yeoreum Yun
2026-09-18 13:58   ` Mike Leach
2026-09-15 11:34 ` [PATCH v11 6/9] coresight: etm4x: introduce struct etm4_caps Yeoreum Yun
2026-09-18 14:01   ` Mike Leach
2026-09-15 11:34 ` [PATCH v11 7/9] coresight: etm4x: exclude ss_status from drvdata->config Yeoreum Yun
2026-09-15 11:49   ` sashiko-bot
2026-09-15 13:35     ` Yeoreum Yun
2026-09-18 14:04   ` Mike Leach
2026-09-18 17:13     ` Yeoreum Yun
2026-09-15 11:34 ` [PATCH v11 8/9] coresight: etm4x: remove s_ex_level from config Yeoreum Yun
2026-09-18 14:05   ` Mike Leach
2026-09-15 11:34 ` [PATCH v11 9/9] coresight: etm3x: introduce struct etm_caps Yeoreum Yun
2026-09-18 14:57   ` Mike Leach

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