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From: Mark Rutland <mark.rutland@arm.com>
To: Sascha Bischoff <Sascha.Bischoff@arm.com>
Cc: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	nd <nd@arm.com>, Catalin Marinas <Catalin.Marinas@arm.com>,
	"will@kernel.org" <will@kernel.org>,
	"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
	"maz@kernel.org" <maz@kernel.org>,
	"oupton@kernel.org" <oupton@kernel.org>,
	"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Subject: Re: [PATCH 1/2] arm64: sysreg: Make write_sysreg_s() select XZR without optimisation
Date: Tue, 8 Sep 2026 17:19:35 +0100	[thread overview]
Message-ID: <aqA1l_86CGSeL_2B@J2N7QTR9R3> (raw)
In-Reply-To: <20260904174855.76185-2-sascha.bischoff@arm.com>

On Fri, Sep 04, 2026 at 06:49:25PM +0100, Sascha Bischoff wrote:
> write_sysreg_s() tests whether its local __val variable is constant when
> deciding whether to use XZR. Compilers only recognise that __val was
> initialised with a constant zero after constant propagation.
> 
> With optimisation disabled, the fallback path therefore selects an
> arbitrary general-purpose register. This is incorrect for instructions
> such as GIC CDEOI, where Rt must be XZR rather than a register containing
> zero.

Which CONFIG_* option needs to be selected for that to happen?

I'm struggling to see how other usage of __builtin_constant_p() wouldn't
blow up in such a configuration, so knowing that would help to
investigate and test.

> Test the macro argument directly so that constant zero selects XZR
> regardless of the optimisation level.
> 
> Fixes: e9ad390a4812 ("arm64/sysreg: Fix GIC CDEOI instruction encoding")
> Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
> ---
>  arch/arm64/include/asm/sysreg.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 7aa08d59d4944..a80bede50f865 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -1204,7 +1204,7 @@
>  #define write_sysreg_s(v, r) do {					\
>  	u64 __val = (u64)(v);						\
>  	u32 __maybe_unused __check_r = (u32)(r);			\
> -	if (__builtin_constant_p(__val) && __val == 0)			\
> +	if (__builtin_constant_p(v) && (u64)(v) == 0)			\

It's not safe to use 'v' here, since 'v' could be an expression with
side-effects, and we must not evaluate it multiple times.

I think we should just enxcode the GIC instructions manually. While they
are SYS/SYSL instructions, they *aren't* MSR/MRS, and using
write_sysreg_s() is a hack.

Mark.

>  		asm volatile(__msr_s(r, "xzr"));			\
>  	else								\
>  		asm volatile(__msr_s(r, "%x0") : : "r" (__val));	\
> -- 
> 2.34.1

  reply	other threads:[~2026-09-08 16:19 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-04 17:48 [PATCH 0/2] arm64: Make write_sysreg_s() select XZR reliably Sascha Bischoff
2026-09-04 17:49 ` [PATCH 1/2] arm64: sysreg: Make write_sysreg_s() select XZR without optimisation Sascha Bischoff
2026-09-08 16:19   ` Mark Rutland [this message]
2026-09-04 17:49 ` [PATCH 2/2] arm64: tools: Fix GIC CDEOI instruction encoding Sascha Bischoff

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