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From: Breno Leitao <leitao@debian.org>
To: "Kiryl Shutsemau (Meta)" <kas@kernel.org>
Cc: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	 Joerg Roedel <joro@8bytes.org>,
	Nicolin Chen <nicolinc@nvidia.com>,
	 Jason Gunthorpe <jgg@nvidia.com>,
	Pranjal Shrivastava <praan@google.com>,
	 Mostafa Saleh <smostafa@google.com>,
	Thierry Reding <thierry.reding@kernel.org>,
	 Krishna Reddy <vdumpa@nvidia.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	 Kyle McMartin <jkkm@meta.com>, Usama Arif <usama.arif@linux.dev>,
	kernel-team@meta.com,  linux-arm-kernel@lists.infradead.org,
	iommu@lists.linux.dev, linux-tegra@vger.kernel.org,
	 linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 1/2] iommu/arm-smmu-v3: Add a cmdq_max_n_shift module parameter
Date: Tue, 15 Sep 2026 05:16:42 -0700	[thread overview]
Message-ID: <aqk207UQxQF1leEm@gmail.com> (raw)
In-Reply-To: <20260909095228.2174031-2-kas@kernel.org>

On Wed, Sep 09, 2026 at 10:52:27AM +0100, Kiryl Shutsemau (Meta) wrote:
> The command queue depth comes straight from the maximum the hardware
> advertises in IDR1, which reaches megabytes of coherent DMA per queue.
> A system with several SMMUv3 instances pays that per instance, and the
> Tegra241 CMDQV pays it again for every VCMDQ it preallocates.

Thanks. I've seen this issue while investigating another SMMU issue[1].
Thanks for fixing it.

Link: https://lore.kernel.org/all/20260911-smmu_fix_aws-v1-0-75870bf9655b@debian.org/ [1]

> Queue depth only bounds how many commands may be in flight before a sync.
> A machine driving a handful of devices, or one with a tight memory budget,
> has no use for the maximum, and no way to say so.
> 
> Add cmdq_max_n_shift, a cap on the depth given as the log2 of the entry
> count, the form the hardware itself takes in the LOG2SIZE field of
> CMDQ_BASE. Decide the depth in arm_smmu_cmdq_max_n_shift(), which caps the
> IDR1 value for natural alignment and then applies the parameter, so the
> queue is allocated at the requested size. The Tegra241 CMDQV sizes its
> VCMDQs from IDR1 itself, so route that through the same helper.
> 
> Floor the request at one page worth of entries. Without the floor, a small
> request trips the CMDQ_BATCH_ENTRIES check in arm_smmu_device_hw_probe()
> and the SMMU fails to probe. The floor also costs nothing: coherent DMA is
> page granular, so a shallower queue occupies the same memory as one that
> fills the page.
> 
> Assisted-by: LLM
> Signed-off-by: Kiryl Shutsemau (Meta) <kas@kernel.org>

Reviewed-by: Breno Leitao <leitao@debian.org>


  reply	other threads:[~2026-09-15 12:17 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-09  9:52 [PATCH v6 0/2] iommu/arm-smmu-v3: Make the queue depths tunable, and shrink them in a kdump kernel Kiryl Shutsemau (Meta)
2026-09-09  9:52 ` [PATCH v6 1/2] iommu/arm-smmu-v3: Add a cmdq_max_n_shift module parameter Kiryl Shutsemau (Meta)
2026-09-15 12:16   ` Breno Leitao [this message]
2026-09-09  9:52 ` [PATCH v6 2/2] iommu/arm-smmu-v3: Default queue depths to one page in a kdump kernel Kiryl Shutsemau (Meta)
2026-09-15 11:20   ` Yuanhe Shu

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