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From: sonang patel <sonangp@nvidia.com>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: Jason Gunthorpe <jgg@nvidia.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, <joro@8bytes.org>,
	Robin Murphy <robin.murphy@arm.com>, <rafael@kernel.org>,
	Danilo Krummrich <dakr@kernel.org>,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	<aneesh.kumar@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Gavin Shan <gshan@redhat.com>, Vikram Sethi <vsethi@nvidia.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	"Shanker Donthineni" <sdonthineni@nvidia.com>,
	Mostafa Saleh <smostafa@google.com>, <rppt@kernel.org>,
	Thomas Huth <thuth@redhat.com>, Marc Zyngier <maz@kernel.org>,
	Ryan Roberts <ryan.roberts@arm.com>, <kas@kernel.org>,
	Kohei Enju <enju.kohei@fujitsu.com>,
	Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	James Morse <james.morse@arm.com>,
	Steven Price <steven.price@arm.com>,
	Sang-Heon Jeon <ekffu200098@gmail.com>,
	Omar Sandoval <osandov@fb.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Jinjie Ruan <ruanjinjie@huawei.com>,
	Sam Edwards <cfsworks@gmail.com>,
	Douglas Anderson <dianders@chromium.org>,
	"Florian Fainelli" <florian.fainelli@broadcom.com>,
	Chen-Yu Tsai <wenst@chromium.org>,
	Huacai Chen <chenhuacai@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Pranjal Shrivastava <praan@google.com>,
	Ashish Mhetre <amhetre@nvidia.com>,
	Shameer Kolothum <skolothumtho@nvidia.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>,
	<driver-core@lists.linux.dev>, Ankit Agrawal <ankita@nvidia.com>
Subject: Re: [PATCH v1 6/8] iommu: Introduce TDISP T=0 state for confidential IOMMUs
Date: Thu, 17 Sep 2026 16:18:16 +0530	[thread overview]
Message-ID: <aqvFcIkll6e2T6M7@sonangrm.nvidia.com> (raw)
In-Reply-To: <0421799346a09bf7f32727330ca1044de05f46ba.1789010941.git.nicolinc@nvidia.com>

On Wed, 9 Sep 2026 20:32:49 -0700, Nicolin Chen wrote:
> + * @tdisp_t1: device uses its confidential IOMMU's T=1 stream. A zero value
> + *            means T=0, where the T=1 stream remains blocked while the core
> + *            owns required DMA operations such as ATS.

What happens when the TDI transitions to ERROR, and how does this bit
signify it?
A TDI can drop to ERROR asynchronously, and at that point the device is
outside the trust boundary again.

Thanks,
Sonang

  reply	other threads:[~2026-09-17 10:49 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-10  3:32 [PATCH v1 0/8] iommu/arm-smmu-v3: Support guest-level Realm VSMMU (Part-1) Nicolin Chen
2026-09-10  3:32 ` [PATCH v1 1/8] firmware: arm_rmm: Move RSI support out of arch/arm64 Nicolin Chen
2026-09-10  3:32 ` [PATCH v1 2/8] firmware: arm_rmm: Add VSMMU commands and fields Nicolin Chen
2026-09-10  3:32 ` [PATCH v1 3/8] dma-mapping: Let a device declare that it reaches private memory Nicolin Chen
2026-09-10  3:32 ` [PATCH v1 4/8] dma-mapping: Keep DMA memory private for capable devices Nicolin Chen
2026-09-10  3:32 ` [PATCH v1 5/8] iommu: Let a driver mark an IOMMU as confidential Nicolin Chen
2026-09-10  3:32 ` [PATCH v1 6/8] iommu: Introduce TDISP T=0 state for confidential IOMMUs Nicolin Chen
2026-09-17 10:48   ` sonang patel [this message]
2026-09-17 13:34     ` Jason Gunthorpe
2026-09-10  3:32 ` [PATCH v1 7/8] iommu: Park TDISP T=0 devices in the blocking domain Nicolin Chen
2026-09-10  3:32 ` [PATCH v1 8/8] iommu/arm-smmu-v3: Probe a guest-level Realm VSMMU via RSI commands Nicolin Chen
2026-09-10  4:23   ` Nicolin Chen

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