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Thu, 17 Sep 2026 10:07:41 -0700 (PDT) X-Received: by 2002:a17:903:11c3:b0:2dd:ad7d:72e3 with SMTP id d9443c01a7336-2ddad7d74femr10397255ad.26.1789664860991; Thu, 17 Sep 2026 10:07:40 -0700 (PDT) Received: from oss.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2dd89d8e6a3sm30492845ad.7.2026.09.17.10.07.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2026 10:07:40 -0700 (PDT) Date: Thu, 17 Sep 2026 22:37:31 +0530 From: Mohd Ayaan Anwar To: netdev-bot+sashiko@kernel.org Cc: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, afd@ti.com, andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, richardcochran@gmail.com, andersson@kernel.org, konradybcio@kernel.org, alexandre.torgue@foss.st.com, peppe.cavallaro@st.com, joabreu@synopsys.com, maxime.chevallier@bootlin.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH net-next v2 5/9] net: stmmac: qcom-ethqos: fix RGMII_ID mode to use DLL bypass Message-ID: References: <20260908-shikra_ethernet-v2-5-bbe3389d0652@oss.qualcomm.com> <178912591493.219967.8863321460780410702@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <178912591493.219967.8863321460780410702@kernel.org> X-Proofpoint-GUID: yZY4VJmCMbEBAQJyE7GKL6cl3oVrtQmN X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE3MDI0MyBTYWx0ZWRfX4k9LjQnizL83 cs9D3VTUh8OZv+BnCm2t55ye6upqIKSfS2Fz1H3yHfrnmfdfHhrAWnZ2LZ0ipcOMuQLJRVEjIQ0 BuYvBjaqJ0ZgDcf2HjsLJTO+iMWt9FvxOV244kjJY9q5tFO+AJg74y70gk3BSLkFs0wmQIyclR4 PQI8Bb5p28+cXBS26vftndqZZb+6iLIzcOW353cs68szlRdpJJq8ff+05h0c+lI1nhHOuTpouif q8r+l7bSJEblPvVbA3dmGMyDLiJ/VQM9nKqn4iyPbs7ejHb83XLYlIV3uZ9M1aIwJaREEH8MXqW TXZZp7NFwEDV2nfHtLOfS9YiGmG662CIP5aBQRrTaT1GY1eSp1pDj1CEJyS1NcCbqmx7EKlHfDi 30RkG6ELZkvNplghPful090Oe8WxQsijY501JD+2ucezotFba68hR1HoLrHAxv5HemjRwTPanZq wp4MhtA/D2WmViQeHyQ== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE3MDI0MyBTYWx0ZWRfX1rIjYiEL+Nfh DcL+XKGu0JVQDTKs0MBmmJHimUEooRGPaM4RfLXPEUiqxGgKKy3DRIGo4fsSgacX+WKG5Vqupj+ 9M3U4cUv7kZ5dj0scEX19CC2szuvkKY= X-Authority-Analysis: v=2.4 cv=GeOCDgXL c=1 sm=1 tr=0 ts=6aac1e5e cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8 a=vOTgahw99eS1XjnIhgcA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-ORIG-GUID: yZY4VJmCMbEBAQJyE7GKL6cl3oVrtQmN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-17_04,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 phishscore=0 bulkscore=0 spamscore=0 suspectscore=0 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609170243 On Fri, Sep 11, 2026 at 11:25:14AM +0000, netdev-bot+sashiko@kernel.org wrote: > Thank you for your contribution! Sashiko AI review found 1 potential > issue(s) to consider: > > Critical: 0 · High: 0 · Medium: 1 · Low: 0 > > - [Medium] The patch is worded as a bug fix ("fix RGMII_ID mode to use > DLL bypass", "Also fix ethqos_set_clk_tx_rate()") for two user-visible… > > -- > > net: stmmac: qcom-ethqos: fix RGMII_ID mode to use DLL bypass > > For phy-mode = "rgmii-id" the driver now powers down the DLL, sets DDR > bypass and programs the IO_MACRO through a new > ethqos_rgmii_id_macro_init() helper instead of running the generic DLL > init. It also stops doubling the link clock rate at 100M/10M in that > mode, and drops RGMII_ID from the TX phase-shift suppression in > ethqos_rgmii_macro_init(). > > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c > > index 44270c25d874f..53fb9de4d92c7 100644 > > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c > > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c > > [ ... ] > > > @@ -183,7 +186,15 @@ static int ethqos_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i, > > if (rate < 0) > > return rate; > > > > - return clk_set_rate(ethqos->link_clk, rate * 2); > > + /* Clock Rate Requirements: > > + * MAC added delay: 250/50/5 Mhz for 1G/100M/10M > > + * No MAC delay (DLL bypass): 250/25/2.5 Mhz for 1G/100M/10M > > + */ > > + if (ethqos->phy_mode != PHY_INTERFACE_MODE_RGMII_ID || > > + speed == SPEED_1000) > > + rate *= 2; > > + > > + return clk_set_rate(ethqos->link_clk, rate); > > } > > [ ... ] > > > @@ -493,6 +539,21 @@ static void ethqos_fix_mac_speed_rgmii(void *bsp_priv, > > > > ethqos_set_func_clk_en(ethqos); > > > > + /* For rgmii-id mode, the PHY should add the required delays. > > + * Therefore, power down the DLL and program it in bypass mode. > > + * Program the IO_MACRO as per the settings recommended by the > > + * programming guide for bypass mode. This will ensure that the > > + * MAC core doesn't add any additional delays. > > + */ > > + if (ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_ID) { > > + rgmii_setmask(ethqos, SDCC_DLL_CONFIG_PDN, SDCC_HC_REG_DLL_CONFIG); > > + rgmii_setmask(ethqos, SDCC_USR_CTL_DDR_BYPASS, SDCC_USR_CTL); > > + > > + ethqos_rgmii_id_macro_init(ethqos, speed); > > + > > + return; > > + } > > + > > [Severity: Medium] > The changelog describes this as two functional corrections, "fix RGMII_ID > mode to use DLL bypass" and "Also fix ethqos_set_clk_tx_rate() to not > double the clock rate in bypass mode at 100M/10M", but there is no Fixes: > tag. Should one be added? > > Both defects look reachable before this patch. qcom_ethqos_probe() accepts > PHY_INTERFACE_MODE_RGMII_ID and installs the affected callback: > > case PHY_INTERFACE_MODE_RGMII_ID: > case PHY_INTERFACE_MODE_RGMII_RXID: > case PHY_INTERFACE_MODE_RGMII_TXID: > plat_dat->fix_mac_speed = ethqos_fix_mac_speed_rgmii; > > so an rgmii-id link previously ran the full DLL init and had the RX delay > programmed by ethqos_rgmii_macro_init() through > SDCC_DDR_CONFIG_PRG_RCLK_DLY / SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY, and also > got rate * 2 from ethqos_set_clk_tx_rate(). > > The partial mitigation for the TX side came in with 164a9ebe9742 ("net: > stmmac: dwmac-qcom-ethqos: Respect phy-mode and TX delay"), which only > suppressed RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN and left the RX delay and > the doubled rate in place. Would that commit, or the original driver > commit, be the right Fixes: target here? > > Related question: which platform reproduces the misprogramming, and on > which hardware was the new bypass register sequence in > ethqos_rgmii_id_macro_init() validated? Grepping arch/arm64/boot/dts/qcom > turns up no ethqos node using phy-mode = "rgmii-id" (only sa8540p-ride.dts, > which uses "rgmii-txid"), so it is hard to tell from the changelog who is > affected and what the backport risk is. Could that be stated in the commit > message? > Since there are no current ethqos users of "rgmii-id", nothing is really broken in the current tree, so a Fixes: tag might not be required. Ayaan