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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33bf5a6a1a5sm19633819eec.5.2026.09.17.18.11.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2026 18:11:20 -0700 (PDT) Date: Fri, 18 Sep 2026 09:11:15 +0800 From: Shawn Guo To: Neil Armstrong Cc: Linus Walleij , Bartosz Golaszewski , Bjorn Andersson , Yu Zhang , linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] pinctrl: qcom: spmi-gpio: make direction changes exclusive Message-ID: References: <20260915014447.282121-1-shengchao.guo@oss.qualcomm.com> <20260915014447.282121-3-shengchao.guo@oss.qualcomm.com> <0d0ee38b-8ded-480d-a586-d26b3c292427@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <0d0ee38b-8ded-480d-a586-d26b3c292427@linaro.org> X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE4MDAxMiBTYWx0ZWRfX0kGbOTiTh9LY yLL2cWWyBHNdODDJgGoUfdT1ccemuSU/kEI2SopguVLG1EqNVQ7RBHKzVzYFQiUqWwV4Yv96WB1 indXX/OoXiiJHZ/7AF3yhSSlAJwcgEoXyhJhfAGePyRCsjoGxFUUag4923yrl+GHhLHI2iXN+wZ TBhh99RMSgHrj3r2+dTJPgfhpV8OtV6kfqFMA3oHkOBDrTunEcQfryUkV6FaQJg21suWDxrHHXd PjHr0E+ktIj6S69fQj5aJ0v0HoMQCjygGp7vUVm+xCQv/VWAJrms2afIDInCrUreb+eqqO0muSa AvINfzrZyA+Yq9tRruHyUQgkBQYjWWRbYe3ov9DOtDxVFInXgxHG6ntw5rv7kjX+ESA0KS3cQMm sgng2RaGm1pJIvoCrdtxAWsUXfBbT3a4hmfaH2hPydgRf6W+Umcgs/+IT+AeiJ831JN654s47m9 toTJNJPaLJU/k5cIWzA== X-Proofpoint-ORIG-GUID: Oj9hZaZbYgidsSL4XJ_j90HYrtXhYTPX X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE4MDAxMiBTYWx0ZWRfX1n8S+IQVKONy 97JwgKg/p0m0lZylGCEEdr75TVmD4Lp4ax1YsexFecu8CwioZWpNC1Qxuxi1hemhNPEb8+fpVo2 aSyQSjJeEMSP7Mopv/A7z8GT3APbJAg= X-Authority-Analysis: v=2.4 cv=J9Q/fwnS c=1 sm=1 tr=0 ts=6aac8fb9 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=HOgYhUj95sWBd04HZmAA:9 a=CjuIK1q_8ugA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-GUID: Oj9hZaZbYgidsSL4XJ_j90HYrtXhYTPX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-17_05,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 impostorscore=0 clxscore=1015 suspectscore=0 phishscore=0 priorityscore=1501 bulkscore=0 malwarescore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609180012 On Tue, Sep 15, 2026 at 03:11:48PM +0200, Neil Armstrong wrote: > On 9/15/26 03:44, Shawn Guo wrote: > > pmic_gpio_populate() seeds pad->input_enabled and pad->output_enabled from > > the hardware MODE_CTL register, so a pad left in DIGITAL_INPUT or > > DIGITAL_INPUT_OUTPUT mode by the bootloader starts out with the input > > buffer enabled. Neither direction callback clears the opposite buffer: > > .direction_output() only packs PIN_CONFIG_LEVEL, which sets > > output_enabled, and .direction_input() only packs PIN_CONFIG_INPUT_ENABLE, > > which sets input_enabled. Requesting either direction on such a pad > > therefore programs MODE_DIGITAL_INPUT_OUTPUT rather than the requested > > direction. > > > > That silently breaks both directions. After gpiod_direction_input() the > > pad keeps driving the line, since the output buffer is never disabled. > > And after gpiod_direction_output() pmic_gpio_get_direction() still reports > > GPIO_LINE_DIRECTION_IN, because it cannot tell plain input from > > input+output, which makes gpiolib consider the line an input while the > > driver is driving it. On a board where several regulator-fixed nodes > > share one PMIC GPIO the shared GPIO proxy reads that direction back and > > rejects every consumer after the first: > > > > reg-fixed-voltage regulator-wcn-core-vm-1p35: setup of GPIO (default) failed: -1 > > reg-fixed-voltage regulator-wcn-core-vm-1p35: error -EPERM: can't get GPIO > > > > Pack the opposite buffer's PIN_CONFIG_*_ENABLE along with the requested > > direction so that the resulting MODE_CTL is DIGITAL_INPUT or > > DIGITAL_OUTPUT, never both. pmic_gpio_config_set() programs the registers > > once after walking all configs, so this stays a single register write. > > > > Pads that are genuinely bidirectional can still be described that way > > through pinconf, which is the interface that has always been able to > > express it; the gpiolib direction callbacks now mean what gpiolib says > > they mean. > > > > Assisted-by: LLM > > Fixes: eadff3024472 ("pinctrl: Qualcomm SPMI PMIC GPIO pin controller driver") > > You should add: > Fixes: 263447532463 ("pinctrl: qcom: spmi-gpio: implement .get_direction()") > > Since my change added the get_direction callback. Indeed! > > Personally I would prefer patch 1 instead of this change. As I mentioned in the cover letter, both patches are fixing real bugs existing at different level. So I prefer to merge both. But it's a call up to Bartosz. Shawn