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Wed, 30 Sep 2026 16:01:00 +0000 Date: Wed, 30 Sep 2026 11:00:48 -0500 From: Frank Li To: "Peng Fan (OSS)" Cc: Frank Li , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Frank Li , Joy Zou , imx@lists.linux.dev, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Peng Fan Subject: Re: [PATCH v2 1/3] dt-bindings: dma: fsl,edma: add per-channel child node support Message-ID: References: <20260930-edma-iommu-v2-0-72a62bf44c74@nxp.com> <20260930-edma-iommu-v2-1-72a62bf44c74@nxp.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260930-edma-iommu-v2-1-72a62bf44c74@nxp.com> X-ClientProxiedBy: PH7PR13CA0004.namprd13.prod.outlook.com (2603:10b6:510:174::25) To GV2PR04MB11799.eurprd04.prod.outlook.com (2603:10a6:150:2cf::9) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR04MB11799:EE_|AM8PR04MB7459:EE_ X-MS-Office365-Filtering-Correlation-Id: 013612a5-aab5-4356-b8b0-08df1f0c05a3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|19092799006|7416014|1800799024|366016|376014|10067099003|56012099006|4143699003|11063799006|18002099003|22082099003; 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Each child node can carry its own reg, > interrupts, iommus, and power-domains properties, describing a real > per-channel MMIO region. > > Enables per-channel IOMMU stream ID assignment via the standard > iommus property on each child. > > The interrupts property is removed from the required list since > channels with child nodes carry their own interrupts. Existing DTS > without child nodes remains valid. > > Assisted-by: LLM > Signed-off-by: Peng Fan > --- > .../devicetree/bindings/dma/fsl,edma.yaml | 70 +++++++++++++++++++++- > 1 file changed, 69 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml > index f609038e35ae..19a103baccaf 100644 > --- a/Documentation/devicetree/bindings/dma/fsl,edma.yaml > +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml > @@ -104,11 +104,40 @@ properties: > Bit semantics: 0 means channel available, 1 means channel unavailable > default: 0 > > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + ranges: true > + > +patternProperties: > + "^dma-channel@[0-9a-f]+$": > + type: object > + additionalProperties: false > + > + properties: > + reg: > + maxItems: 1 > + description: Per-channel register region within the eDMA block. > + > + interrupts: > + maxItems: 1 > + > + iommus: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + required: > + - reg > + > required: > - "#dma-cells" > - compatible > - reg > - - interrupts > - dma-channels > > allOf: > @@ -351,3 +380,42 @@ examples: > <&pd IMX_SC_R_DMA_3_CH6>, > <&pd IMX_SC_R_DMA_3_CH7>; > }; > + > + - | > + #include > + > + dma-controller@42000000 { > + compatible = "fsl,imx95-edma5"; > + reg = <0x42000000 0x210000>; > + #dma-cells = <3>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + dma-channels = <64>; > + clocks = <&clk 0>; > + clock-names = "dma"; > + > + dma-channel@42020000 { > + reg = <0x42020000 0x8000>; > + interrupts = ; > + iommus = <&smmu 0x30>; > + }; > + > + dma-channel@42028000 { > + reg = <0x42028000 0x8000>; > + interrupts = ; > + iommus = <&smmu 0x30>; > + }; > + > + dma-channel@42030000 { > + reg = <0x42030000 0x8000>; > + interrupts = ; > + iommus = <&smmu 0x31>; > + }; > + > + dma-channel@42038000 { > + reg = <0x42038000 0x8000>; > + interrupts = ; > + iommus = <&smmu 0x31>; > + }; Nit: kept 2 dma-channel should be enough. Reviewed-by: Frank Li > + }; > > -- > 2.51.0 >