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Wed, 30 Sep 2026 13:13:02 -0700 Received: from nvidia.com (10.127.8.11) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49 via Frontend Transport; Wed, 30 Sep 2026 13:12:59 -0700 Date: Wed, 30 Sep 2026 13:12:57 -0700 From: Nicolin Chen To: Pranjal Shrivastava CC: , Will Deacon , Joerg Roedel , Robin Murphy , Jason Gunthorpe , Mostafa Saleh , Daniel Mentz , Ashish Mhetre , , Thomas Gleixner , Radu Rendec , Bjorn Helgaas , , , "Greg Kroah-Hartman" , , "Danilo Krummrich" , , Jason Gunthorpe Subject: Re: [PATCH v11 10/16] iommu/arm-smmu-v3: Factor out arm_smmu_handle_gerror() Message-ID: References: <20260929034510.2023173-1-praan@google.com> <20260929034510.2023173-11-praan@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000012:EE_|CH1PPFE5ACC0FD2:EE_ X-MS-Office365-Filtering-Correlation-Id: 3a9a6102-10d1-4a02-eb3d-08df1f2f43d8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|82310400026|1800799024|36860700016|23010399003|4143699003|260925021911599003|260925022911599003|260925021311599003|10067099003|6133799003|11063799006|56012099006|5023799004|22082099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 21TVMOVLXRpVAOpvpxoq67I+7azxqqIn9O6m6x+g/RMvokS3za8DhIQCEknpCt+Ijj5n5v4QEgihHN4r3EMWPH95efP4VY3Xb7kvj2mK5GDyBXA1L8LvTipyvhkwp7Y8HeeHK1btiJwq8hSE1sGrv9SiOCbk4eQaVg2GNhXVZV0oOjJ5jBL86Ppnw4uOLazNbaOA6rBmlHATWouLvl5rptfLZYgxVFJSV/I0T3FxLejrq4ZYjmFkRIJCQtK0Jogsu1dDTkKbmaolyBpkjcEGTdbRgTkcRECN3HLflVnJiZoLBvd+FBw1dg7zuQHb/dEKG0mVYpPoUOyLQ5UcmloOYCA4BDaGhwQcVG+1L0QFbl8bQBJC6Ttulp4b5oI2lfEm6t6appN/bjLCVHJ95h/9d76IRwQUM5yVGhIh5e1p2Rsox9JwJDOjwdPk6K4yvy55 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Sep 2026 20:13:17.0663 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3a9a6102-10d1-4a02-eb3d-08df1f2f43d8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000012.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PPFE5ACC0FD2 On Wed, Sep 30, 2026 at 08:00:31PM +0000, Pranjal Shrivastava wrote: > On Wed, Sep 30, 2026 at 11:34:40AM -0700, Nicolin Chen wrote: > > On Tue, Sep 29, 2026 at 03:45:04AM +0000, Pranjal Shrivastava wrote: > > > The GERROR register's state might be lost when the SMMU is powered down > > > during runtime suspend, requiring the suspend sequence to handle any > > > pending errors before the hardware state is lost. > > > > > > Refactor the gerror handling logic into a helper function. Subsequent > > > patches will invoke it from the runtime suspend callback after disabling > > > the SMMU, ensuring that any late-breaking gerrors are logged and ack'ed > > > before the hardware state is lost. > > > > CMDQV has a separate IRQ, so I think it likely needs a counterpart. > > > > I have a similar patch in one of my series: > > https://lore.kernel.org/linux-iommu/16ae24cc2a002802b990afa1a69fe4ceab1e0da2.1790188510.git.nicolinc@nvidia.com/ > > > > Mine only handles CMDQ error though.. > > > > I'll add a counterpart to arm_smmu_handle_gerror() in v12, I'll factor > out the body of tegra241_cmdqv_isr() into something like > tegra241_cmdqv_handle_errors() (bailing out early if VINTF_ERR_MAP is > clear, so we don't warn on every suspend). The new impl->suspend op > would call it after draining the lvcmdqs, with cmdqv->irq disabled > around it, right before hw_deinit(vintf0). > > Since yours is for the CMD_SYNC timeout path, I'll keep this > independent? WDYT? I'm fine with the independent function for now. Nicolin