Re: [PATCH v8 03/25] iommu/arm-smmu-v3: Introduce RangeInval encoding helpers

[Nicolin Chen <nicolinc@nvidia.com>]

On Tue, Sep 22, 2026 at 01:12:36PM +0000, Mostafa Saleh wrote:
> +/* Convert page size of 12,14,16 (log2) to 1,2,3 */
> +static inline u8 arm_smmu_tlb_inv_tg_enc(size_t tg)

The prefix "arm_smmu_tlb_" is used by the iommu_flush_ops.

How about arm_smmu_cmd_tlbi_tg_enc?

> +static inline u64 arm_smmu_tlb_inv_addr(unsigned long iova, bool leaf, u8 ttl, u8 tg_enc)
> +{
> +	return FIELD_PREP(CMDQ_TLBI_1_LEAF, leaf) |
> +		FIELD_PREP(CMDQ_TLBI_1_TTL, ttl) |
> +		FIELD_PREP(CMDQ_TLBI_1_TG, tg_enc) |
> +		(iova & ~GENMASK_U64(11, 0));
> +}

This actually covers entire data1 than just "addr", so maybe
arm_smmu_cmd_tlbi_data1_enc?

> +/*
> + * @num: Number of 2^scale granules, must be >= 1.
> + */

Nit: single-line style

> +static inline u64 arm_smmu_tlb_inv_range_enc(u8 num, u8 scale)
> +{
> +	/* Keep the pre-DS 5-bit truncation when scale > 31 */
> +	return FIELD_PREP(CMDQ_TLBI_0_NUM, num - 1) |
> +		FIELD_PREP(CMDQ_TLBI_0_SCALE, scale & 0x1f);

And this could be arm_smmu_cmd_tlbi_data0_enc that takes orig too,
matching with data1_enc().

Nicolin