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charset=us-ascii Content-Disposition: inline In-Reply-To: <20260922204535.2850094-5-karunika.choo@arm.com> X-Zoho-Virus-Status: 1 X-Zoho-AV-Stamp: zmail-av-0.2.13.1.5.4/290.95.26 On Tue, Sep 22, 2026 at 09:44:58PM +0100, Karunika Choo wrote: > Mali v15 exposes a 64-bit GPU_ID register with a different field layout > from earlier GPUs. > > Add the register definitions and decoding helpers for the new format, > read GPU_WIDE_ID when the compatibility value indicates a v15 GPU, and > populate both the cached GPU_ID fields and the uAPI gpu_wide_id field. > > This allows userspace and the driver to identify v15 GPUs correctly. > > Signed-off-by: Karunika Choo > --- > v1: > - Decode selected GPU_ID format after checking compatibility value. > - Document GPU_DISCOVER and GPU_CONTROL register offset differences > between GPUs. > - Fix mask generation in panthor_gpu_discover_regs.h > > .../drm/panthor/panthor_gpu_discover_regs.h | 19 +++++++++ > drivers/gpu/drm/panthor/panthor_hw.c | 42 +++++++++++++++---- > include/uapi/drm/panthor_drm.h | 13 ++++++ > 3 files changed, 65 insertions(+), 9 deletions(-) > create mode 100644 drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h > > diff --git a/drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h b/drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h > new file mode 100644 > index 0000000000000..e6bfe1fe2c68a > --- /dev/null > +++ b/drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h > @@ -0,0 +1,19 @@ > +/* SPDX-License-Identifier: GPL-2.0 or MIT */ > +/* Copyright 2026 ARM Limited. All rights reserved. */ > + > +#ifndef __PANTHOR_GPU_DISCOVER_REGS_H__ > +#define __PANTHOR_GPU_DISCOVER_REGS_H__ > + > +#include > + > +#define GPU_WIDE_ID 0x0 > +#define GPU_WIDE_COMPAT 0xF > +#define GPU_WIDE_ARCH_MAJOR(x) (((x) & GENMASK_U64(63, 56)) >> 56) > +#define GPU_WIDE_ARCH_MINOR(x) (((x) & GENMASK_U64(55, 48)) >> 48) > +#define GPU_WIDE_ARCH_REV(x) (((x) & GENMASK_U64(47, 40)) >> 40) > +#define GPU_WIDE_PROD_MAJOR(x) (((x) & GENMASK_U64(39, 32)) >> 32) > +#define GPU_WIDE_VER_MAJOR(x) (((x) & GENMASK_U64(23, 16)) >> 16) > +#define GPU_WIDE_VER_MINOR(x) (((x) & GENMASK_U64(15, 8)) >> 8) > +#define GPU_WIDE_VER_STATUS(x) ((x) & GENMASK_U64(7, 0)) > + > +#endif /* __PANTHOR_GPU_DISCOVER_REGS_H__ */ > diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c > index 2143e57d48106..40012ba7e23ca 100644 > --- a/drivers/gpu/drm/panthor/panthor_hw.c > +++ b/drivers/gpu/drm/panthor/panthor_hw.c > @@ -8,6 +8,7 @@ > > #include "panthor_device.h" > #include "panthor_gpu.h" > +#include "panthor_gpu_discover_regs.h" > #include "panthor_gpu_regs.h" > #include "panthor_hw.h" > #include "panthor_pwr.h" > @@ -296,18 +297,41 @@ static int panthor_hw_bind_device(struct panthor_device *ptdev) > static int panthor_hw_gpu_id_init(struct panthor_device *ptdev) > { > struct panthor_gpu_id *gpu_id = &ptdev->gpu_id; > - ptdev->gpu_info.gpu_id = gpu_read(ptdev->iomem, GPU_ID); > + u32 gpu_id32 = gpu_read(ptdev->iomem, GPU_ID); > > - if (!ptdev->gpu_info.gpu_id) > + if (!gpu_id32) > return -ENXIO; > > - gpu_id->arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id); > - gpu_id->arch_minor = GPU_ARCH_MINOR(ptdev->gpu_info.gpu_id); > - gpu_id->arch_rev = GPU_ARCH_REV(ptdev->gpu_info.gpu_id); > - gpu_id->prod_major = GPU_PROD_MAJOR(ptdev->gpu_info.gpu_id); > - gpu_id->ver_major = GPU_VER_MAJOR(ptdev->gpu_info.gpu_id); > - gpu_id->ver_minor = GPU_VER_MINOR(ptdev->gpu_info.gpu_id); > - gpu_id->ver_status = GPU_VER_STATUS(ptdev->gpu_info.gpu_id); > + if (GPU_ARCH_MAJOR(gpu_id32) == GPU_WIDE_COMPAT) { > + /* > + * GPU_DISCOVER register block always starts at offset zero, > + * so does the GPU_CONTROL register block on pre-v15 GPUs. > + */ > + void __iomem *discover = ptdev->iomem; > + u64 gpu_id64 = gpu_read64(discover, GPU_WIDE_ID); > + if (!gpu_id64) > + return -ENXIO; > + > + ptdev->gpu_info.gpu_wide_id = gpu_id64; > + > + gpu_id->arch_major = GPU_WIDE_ARCH_MAJOR(gpu_id64); > + gpu_id->arch_minor = GPU_WIDE_ARCH_MINOR(gpu_id64); > + gpu_id->arch_rev = GPU_WIDE_ARCH_REV(gpu_id64); > + gpu_id->prod_major = GPU_WIDE_PROD_MAJOR(gpu_id64); > + gpu_id->ver_major = GPU_WIDE_VER_MAJOR(gpu_id64); > + gpu_id->ver_minor = GPU_WIDE_VER_MINOR(gpu_id64); > + gpu_id->ver_status = GPU_WIDE_VER_STATUS(gpu_id64); > + } else { > + ptdev->gpu_info.gpu_id = gpu_id32; > + > + gpu_id->arch_major = GPU_ARCH_MAJOR(gpu_id32); > + gpu_id->arch_minor = GPU_ARCH_MINOR(gpu_id32); > + gpu_id->arch_rev = GPU_ARCH_REV(gpu_id32); > + gpu_id->prod_major = GPU_PROD_MAJOR(gpu_id32); > + gpu_id->ver_major = GPU_VER_MAJOR(gpu_id32); > + gpu_id->ver_minor = GPU_VER_MINOR(gpu_id32); > + gpu_id->ver_status = GPU_VER_STATUS(gpu_id32); > + } > > return 0; > } > diff --git a/include/uapi/drm/panthor_drm.h b/include/uapi/drm/panthor_drm.h > index a2ff0f4ec6915..843a0b40e1d36 100644 > --- a/include/uapi/drm/panthor_drm.h > +++ b/include/uapi/drm/panthor_drm.h > @@ -376,6 +376,19 @@ struct drm_panthor_gpu_info { > > /** @gpu_features: Bitmask describing supported GPU-wide features */ > __u64 gpu_features; > + > + /** > + * @gpu_wide_id: 64-bit GPU ID for v15 and later GPUs. @gpu_id is 0 when > + * this is populated. > + */ > + __u64 gpu_wide_id; > +#define DRM_PANTHOR_WIDE_ARCH_MAJOR(x) (((x) >> 56) & 0xff) > +#define DRM_PANTHOR_WIDE_ARCH_MINOR(x) (((x) >> 48) & 0xff) > +#define DRM_PANTHOR_WIDE_ARCH_REV(x) (((x) >> 40) & 0xff) > +#define DRM_PANTHOR_WIDE_PRODUCT_MAJOR(x) (((x) >> 32) & 0xff) > +#define DRM_PANTHOR_WIDE_VERSION_MAJOR(x) (((x) >> 16) & 0xff) > +#define DRM_PANTHOR_WIDE_VERSION_MINOR(x) (((x) >> 8) & 0xff) > +#define DRM_PANTHOR_WIDE_VERSION_STATUS(x) ((x) & 0xff) > }; This patch is meant to pre-emptively prevent a compile failure for tyr that sashiko-bot pointed out will happen from this patch (or anything similar :)) https://lore.kernel.org/rust-for-linux/20260922-b4-gpu_info_zero-v1-1-7259840069c6@collabora.com/T/#u > > /** > -- > 2.43.0 >