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Wed, 23 Sep 2026 18:12:46 -0700 Date: Wed, 23 Sep 2026 18:12:44 -0700 From: Nicolin Chen To: Jason Gunthorpe CC: , , Jonathan Cameron , , , , , , , , Jean-Philippe Brucker , Eric Auger , , , , , , , , , Subject: Re: [PATCH v5 08/15] iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU Message-ID: References: <0ca69e93a9370e4e172e4335104859648b8755c2.1789446520.git.nicolinc@nvidia.com> <179018862539.3334538.4925881940702512638.b4-review@b4> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <179018862539.3334538.4925881940702512638.b4-review@b4> X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044A7:EE_|BL1PR12MB5850:EE_ X-MS-Office365-Filtering-Correlation-Id: 15ba8340-3617-4db7-3e22-08df19d8fc2c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|23010399003|36860700016|82310400026|1800799024|56012099006|7136999003|3023799007|10067099003|11063799006|5023799004|4143699003|18002099003|11062099010|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 1SE+8EL5IJWd5Txikkc8v3phsH3dPwvs/lxG71bQuIxe1JCYqdNXuOnU+9Wbg+9sCzv6kO/bIRCcfbMRr/vsRKzAo/zqt83tpMiPLLTP4+ksEzGFeVYNPPoI/Ue09fWc5lJj/YflXZIjTCMZhvuNUs5idop9uZ8wFKcETMyv6xrXG1YcKZYMIZ2hf5vlDnfbJ8TZ6JDvv662/4NoUwdyhf2fjf9jjWHMVMr1GVVJuiM1TJjZpL4Qk976PUYrfFJlkHJ4lNZ4SlvIDWGXPN8hzmcf+56Tnz7HNAgUTJENne6Hq0qB5qMpdmqhlxZVO8rPu8uPiuvNkw3g2cNnH6NmhuFBds1QRDn6cEwbuEYMHDD0wKIMyZ0dv8tQtWQsIfPe6zAKxb7PgZLenJWxpR18M8nW/Ys88EeQXwmMA4o5ojSqwMYDGRG1uRBmkLei0swj X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Sep 2026 01:13:04.2502 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 15ba8340-3617-4db7-3e22-08df19d8fc2c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A7.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5850 On Wed, Sep 23, 2026 at 03:37:05PM -0300, Jason Gunthorpe wrote: > > The EVTQ, PRIQ and combined IRQ handlers are threaded and issue commands of > > their own, e.g. a CMDQ_OP_PRI_RESP for a page request. Disabling the SMMU > > while one is in flight hands that command to a queue consuming nothing, so > > its poll waits out a full timeout. > > This seems like a sashiko hallucination? > > There are no PRIs during probe. The initial STE table does not permit > it. Checked my long rework history. Yes... my bad.. > > Two paths disable the SMMU while those IRQs are still requested: a failing > > arm_smmu_device_reset() returns to a probe that disables the device itself, > > and arm_smmu_disable_action() covers an unbind or any later probe failure. > > Both can run after arm_smmu_setup_irqs() requested the IRQs. > > That's fscking devm again. Do not mix devm and non devm CALLS. It > doesn't work: > > ret = arm_smmu_device_reset(smmu); > if (ret) { > arm_smmu_device_disable(smmu); <------------------- > return ret; > } > > /* Register last so it unwinds first, while the CMDQ is still up. */ > ret = devm_add_action_or_reset(smmu->dev, arm_smmu_disable_action, smmu); > if (ret) > return ret; This seems requiring a reorder. > When devm is devm'ing properly the existing devm irq handlers will be > torn down before disable_action and we don't need to open code a > disable_irq I see. Yes. > That just leaves shutdown, and I'm not sure how that is supposed to > work, we can't just halt the SMMU while there are any threads running > around still poking at it. I forget the context shutdown runs in, but > if concurrency is shut down already then its fine to not disable the > irqs. > > If not, it doesn't work safely for lots of reasons, and disable_irq is > not going to fix it enough. > > Maybe that is something to tackle after the power management series as > shutdown is sort of like power down. OK. Let's leave it. Thanks Nicolin